Fix tx interrupt in init. Enable tx and rx interrupt in _enableirq function. Add...

[bertos.git] / cpu / arm / drv / ser_at91.c

diff --git a/cpu/arm/drv/ser_at91.c b/cpu/arm/drv/ser_at91.c
index a35a90c7e3c65c0477398df94781b4e63461c9e5..650529b5d6f1a7b88464ea884af24435d0388d4b 100644 (file)
--- a/cpu/arm/drv/ser_at91.c
+++ b/cpu/arm/drv/ser_at91.c
@@ -145,10 +145,15 @@ static void serirq_tx(void)
        {
                /* Enable Tx and Rx */
                US0_CR = BV(US_RXEN) | BV(US_TXEN);
+               /* Enable Rx interrupt */
+               US0_IER = BV(US_RXRDY);
+               /* Disable Tx interrupt */
+               US0_IDR = BV(US_TXRDY);
        }
        else
        {
                char c = fifo_pop(txfifo);
+               kprintf("Tx char: %c\n", c);
                /* Send one char */
                US0_THR = c;
        }
@@ -163,7 +168,7 @@ static void serirq_rx(void)
 {
        SER_STROBE_ON;
 
-       /* Should be read before UDR */
+       /* Should be read before US_CRS */
        ser_uart0->status |= US0_CSR & (SERRF_RXSROVERRUN | SERRF_FRAMEERROR);
 
        char c = US0_RHR;
@@ -173,6 +178,7 @@ static void serirq_rx(void)
                ser_uart0->status |= SERRF_RXFIFOOVERRUN;
        else
        {
+               kprintf("Recv char: %c\n", c);
                fifo_push(rxfifo, c);
        }
 
@@ -187,12 +193,16 @@ static void serirq_dispatcher(void)
 {
        IRQ_ENTRY();
 
-       if (US0_IMR | BV(US_RXRDY))
+       if (US0_IMR & BV(US_RXRDY))
+       {
+               kprintf("IRQ RX\n");
                serirq_rx();
-
-       if (US0_IMR | BV(US_TXRDY))
+       }
+       if (US0_IMR & BV(US_TXRDY))
+       {
+               kprintf("IRQ TX\n");
                serirq_tx();
-
+       }
        IRQ_EXIT();
 }
 
@@ -203,35 +213,35 @@ static void uart0_init(
        UNUSED_ARG(struct SerialHardware *, _hw),
        UNUSED_ARG(struct Serial *, ser))
 {
+       /* Disable all interrupt */
+       US0_IDR = 0xFFFFFFFF;
 
        /* Set the vector. */
        AIC_SVR(US0_ID) = serirq_dispatcher;
        /* Initialize to edge triggered with defined priority. */
        AIC_SMR(US0_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED;
-       /* Clear pending interrupt */
-       AIC_ICCR = BV(US0_ID);
-       /* Enable the system IRQ */
+       /* Enable the USART IRQ */
        AIC_IECR = BV(US0_ID);
 
     /* Enable UART clock. */
        PMC_PCER = BV(US0_ID);
 
     /* Disable GPIO on UART tx/rx pins. */
-       PIOA_PDR = BV(PA0_RXD0_A) | BV(PA1_TXD0_A);
+       PIOA_PDR = BV(5) | BV(6);
 
        /* Reset UART. */
        US0_CR = BV(US_RSTRX) | BV(US_RSTTX);
 
+       /* Set serial param: mode Normal, 8bit data, 1bit stop */
+       US0_MR = US_CHMODE_NORMAL | US_CHRL_8 | US_NBSTOP_1;
+
        /* Enable Tx and Rx */
        US0_CR = BV(US_RXEN) | BV(US_TXEN);
 
+       /* Enable Rx interrupt*/
        US0_IER = BV(US_RXRDY);
 
-    /* enable GPIO on UART tx/rx pins. */
-       PIOA_PER = BV(PA0_RXD0_A) | BV(PA1_TXD0_A);
 
-       /* Set serial param: mode Normal, 8bit data, 1bit stop */
-       US0_MR |= US_CHMODE_NORMAL | US_CHRL_8 | US_NBSTOP_1;
 }
 
 static void uart0_cleanup(UNUSED_ARG(struct SerialHardware *, _hw))
@@ -253,6 +263,8 @@ static void uart0_enabletxirq(struct SerialHardware *_hw)
                hw->sending = true;
                /* Enable Tx and Rx */
                US0_CR = BV(US_RXEN) | BV(US_TXEN);
+               /* Enable Tx and Rx interrupt*/
+               US0_IER = BV(US_TXRDY) | BV(US_RXRDY);
        }
 }
 
@@ -332,3 +344,9 @@ static struct ArmSerial UARTDescs[SER_CNT] =
                C99INIT(sending, false),
        }
 };
+
+struct SerialHardware *ser_hw_getdesc(int unit)
+{
+       ASSERT(unit < SER_CNT);
+       return &UARTDescs[unit].hw;
+}