* \see sysirq_setEnable
*/
-#include "sysirq.h"
-#include "at91sam7s.h"
-#include <cfg/cpu.h>
+#include "sysirq_at91.h"
+#include <io/arm.h>
+#include <cpu/irq.h>
+#include <cpu/types.h>
#include <cfg/module.h>
#include <cfg/macros.h>
STATIC_ASSERT(countof(sysirq_tab) == SYSIRQ_CNT);
-/*!
- * \brief Interrupt entry.
- */
-#define IRQ_ENTRY() \
- asm volatile("sub lr, lr,#4" "\n\t" /* Adjust LR */ \
- "stmfd sp!,{r0-r12,lr}" "\n\t" /* Save registers on IRQ stack. */ \
- "mrs r1, spsr" "\n\t" /* Save SPSR */ \
- "stmfd sp!,{r1}" "\n\t") /* */
-
-/*!
- * \brief Interrupt exit.
- */
-#define IRQ_EXIT() \
- asm volatile("ldmfd sp!, {r1}" "\n\t" /* Restore SPSR */ \
- "msr spsr_c, r1" "\n\t" /* */ \
- "ldr r0, =0xFFFFF000" "\n\t" /* End of interrupt. */ \
- "str r0, [r0, #0x130]" "\n\t" /* */ \
- "ldmfd sp!, {r0-r12, pc}^" "\n\t") /* Restore registers and return. */
-
-
/**
* System IRQ dispatcher.
* This is the entry point for all system IRQs in AT91.
static void sysirq_dispatcher(void)
{
IRQ_ENTRY();
- for (unsigned i = 0; i < countof(sysirq_tab); i++)
- {
- if (sysirq_tab[i].enabled
- && sysirq_tab[i].handler)
- sysirq_tab[i].handler();
- }
+
+ /* PIT */
+ if ((PIT_MR & BV(PITIEN))
+ && (PIT_SR & BV(PITS))
+ && sysirq_tab[SYSIRQ_PIT].handler)
+ sysirq_tab[SYSIRQ_PIT].handler();
+
+ /* TODO: add other system sources here */
IRQ_EXIT();
}
IRQ_SAVE_DISABLE(flags);
/* Disable all system interrupts */
- for (unsigned i = 0; i < countof(sysirq_tab); i++)
- sysirq_tab[i].setEnable(false);
+ PIT_MR &= BV(PITIEN);
+ /* TODO: add other system sources here */
/* Set the vector. */
AIC_SVR(SYSC_ID) = sysirq_dispatcher;
*/
void sysirq_setHandler(sysirq_t irq, sysirq_handler_t handler)
{
- ASSERT(irq >= 0);
ASSERT(irq < SYSIRQ_CNT);
sysirq_tab[irq].handler = handler;
}
*/
void sysirq_setEnable(sysirq_t irq, bool enable)
{
- ASSERT(irq >= 0);
ASSERT(irq < SYSIRQ_CNT);
sysirq_tab[irq].setEnable(enable);
*/
bool sysirq_enabled(sysirq_t irq)
{
- ASSERT(irq >= 0);
ASSERT(irq < SYSIRQ_CNT);
return sysirq_tab[irq].enabled;