#define US_CR_OFF 0x00000000 ///< USART control register offset.
#define US0_CR (*((reg32_t *)(USART0_BASE + US_CR_OFF))) ///< Channel 0 control register address.
#define US1_CR (*((reg32_t *)(USART1_BASE + US_CR_OFF))) ///< Channel 1 control register address.
-#define US_RSTRX 2 ///< Reset receiver. */
+#define US_RSTRX 2 ///< Reset receiver.
#define US_RSTTX 3 ///< Reset transmitter.
#define US_RXEN 4 ///< Receiver enable.
#define US_RXDIS 5 ///< Receiver disable.
#define US_STTTO 11 ///< Start timeout.
#define US_SENDA 12 ///< Send next byte with address bit set.
#define US_RSTIT 13 ///< Reset interations.
-#define US_RTSNAK 14 ///< Reset non acknowledge.
+#define US_RSTNAK 14 ///< Reset non acknowledge.
#define US_RETTO 15 ///< Rearm time out.
#define US_DTREN 16 ///< Data terminal ready enable.
#define US_DTRDIS 17 ///< Data terminal ready disable.
#define US_USART_MODE_MODEM 0x00000003 ///< Modem.
#define US_USART_MODE_ISO7816T0 0x00000004 ///< ISO7816 protocol: T=0.
#define US_USART_MODE_ISO7816T1 0x00000006 ///< ISO7816 protocol: T=1.
-#define US_USART_MODE_RS485 0x00000008 ///< IrDA.
+#define US_USART_MODE_IRDA 0x00000008 ///< IrDA.
#define US_CLKS_MASK 0x00000030 ///< Clock selection mask.
#define US_CLKS_MCK 0x00000000 ///< Master clock.
#define US_BRGR_OFF 0x00000020 ///< USART baud rate register offset.
#define US0_BRGR (*((reg32_t *)(USART0_BASE + US_BRGR_OFF))) ///< Channel 0 baud rate register address.
#define US1_BRGR (*((reg32_t *)(USART1_BASE + US_BRGR_OFF))) ///< Channel 1 baud rate register address.
-#define US_BRGR_MASK 0x0000FFFF ///< Clock divider.
-#define US_BRGR_FP_MASK 0x001F0000 ///< Fractional part.
/*\}*/
/**