Add battfs test dir.
[bertos.git] / cpu / attr.h
index 678eac68287f010ea70002a962f8cc115a4fc9e1..a95dffdc198fe47364c531164beca27ff9ea7d19 100644 (file)
        #define CPU_SAVED_REGS_CNT     9
        #define CPU_STACK_GROWS_UPWARD 0
        #define CPU_SP_ON_EMPTY_SLOT   0
-       #define CPU_BYTE_ORDER         (__BIG_ENDIAN__ ? CPU_BIG_ENDIAN : CPU_LITTLE_ENDIAN)
+       #warning Find a way to detect endianess at compile time
+       #define CPU_BYTE_ORDER         CPU_LITTLE_ENDIAN
        #define CPU_HARVARD            0
 
        #ifdef __IAR_SYSTEMS_ICC__
                        CPU_PUSH_WORD((sp), funcaddr>>8); \
                } while (0)
 
+       /*
+        * If the kernel is in idle-spinning, the processor execute:
+        * 
+        * IRQ_ENABLE;
+        * CPU_IDLE;
+        * IRQ_DISABLE;
+        *
+        * IRQ_ENABLE is translated in asm as "sei" and IRQ_DISABLE as "cli".
+        * We could define CPU_IDLE to expand to none, so the resulting
+        * asm code would be:
+        *
+        * sei;
+        * cli;
+        *
+        * But Atmel datasheet states:
+        * "When using the SEI instruction to enable interrupts,
+        * the instruction following SEI will be executed *before*
+        * any pending interrupts", so "cli" is executed before any
+        * pending interrupt with the result that IRQs will *NOT*
+        * be enabled!
+        * To ensure that IRQ will run a NOP is required.
+        */
+       #define CPU_IDLE NOP
+
 #else
        #define CPU_PUSH_CALL_CONTEXT(sp, func) \
                CPU_PUSH_WORD((sp), (cpustack_t)(func))