Restore wrong committ.
[bertos.git] / cpu / detect.h
index 1eb6c1385908b91efc1fa03cb31f2aeec5398f01..af2ecd0788a900f0641a0ae6268fcff4eb5142d0 100644 (file)
@@ -26,7 +26,7 @@
  * invalidate any other reasons why the executable file might be covered by
  * the GNU General Public License.
  *
- * Copyright 2004, 2005 Develer S.r.l. (http://www.develer.com/)
+ * Copyright 2004, 2005, 2006, 2007 Develer S.r.l. (http://www.develer.com/)
  * Copyright 2004 Giovanni Bajo
  *
  * -->
        || defined(__ARM4TM__) /* IAR: defined for all cores >= 4tm */
        #define CPU_ARM                 1
        #define CPU_ID                  arm
+
+       // AT91SAM7S core family
+       #if defined(__ARM_AT91SAM7S32__)
+               #define CPU_ARM_AT91         1
+               #define CPU_ARM_AT91SAM7S32  1
+       #else
+               #define CPU_ARM_AT91SAM7S32  0
+       #endif
+
+       #if defined(__ARM_AT91SAM7S64__)
+               #define CPU_ARM_AT91         1
+               #define CPU_ARM_AT91SAM7S64  1
+       #else
+               #define CPU_ARM_AT91SAM7S64  0
+       #endif
+
+       #if defined(__ARM_AT91SAM7S128__)
+               #define CPU_ARM_AT91         1
+               #define CPU_ARM_AT91SAM7S128 1
+       #else
+               #define CPU_ARM_AT91SAM7S128 0
+       #endif
+
+       #if defined(__ARM_AT91SAM7S256__)
+               #define CPU_ARM_AT91         1
+               #define CPU_ARM_AT91SAM7S256 1
+       #else
+               #define CPU_ARM_AT91SAM7S256 0
+       #endif
+
+       // AT91SAM7X core family
+       #if defined(__ARM_AT91SAM7X128__)
+               #define CPU_ARM_AT91         1
+               #define CPU_ARM_AT91SAM7X128 1
+       #else
+               #define CPU_ARM_AT91SAM7X128 0
+       #endif
+
+       #if defined(__ARM_AT91SAM7X256__)
+               #define CPU_ARM_AT91         1
+               #define CPU_ARM_AT91SAM7X256 1
+       #else
+               #define CPU_ARM_AT91SAM7X256 0
+       #endif
+
+
+       #if defined(CPU_ARM_AT91)
+               #if CPU_ARM_AT91SAM7S32 + CPU_ARM_AT91SAM7S64 \
+               + CPU_ARM_AT91SAM7S128 + CPU_ARM_AT91SAM7S256 \
+               + CPU_ARM_AT91SAM7X128 + CPU_ARM_AT91SAM7X256 != 1
+                       #error ARM CPU configuration error
+               #endif
+
+       /* #elif Add other ARM families here */
+       #else
+               #define CPU_ATM_AT91         0
+       #endif
+
+
+       #if CPU_ARM_AT91 + 0 /* Add other ARM families here */ != 1
+               #error ARM CPU configuration error
+       #endif
 #else
        #define CPU_ARM                 0
+
+       /* ARM Families */
+       #define CPU_ARM_AT91            0
+
+       /* ARM CPUs */
+       #define CPU_ARM_AT91SAM7S32     0
+       #define CPU_ARM_AT91SAM7S64     0
+       #define CPU_ARM_AT91SAM7S128    0
+       #define CPU_ARM_AT91SAM7S256    0
+       #define CPU_ARM_AT91SAM7X128    0
+       #define CPU_ARM_AT91SAM7X256    0
 #endif
 
 #if (defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)) \
        #else
                #define CPU_AVR_ATMEGA1281  0
        #endif
+
+       #if CPU_AVR_ATMEGA64 + CPU_AVR_ATMEGA103 + CPU_AVR_ATMEGA128 \
+         + CPU_AVR_ATMEGA8 + CPU_AVR_ATMEGA168 + CPU_AVR_ATMEGA1281 != 1
+               #error AVR CPU configuration error
+       #endif
 #else
        #define CPU_AVR                 0
        #define CPU_AVR_ATMEGA8         0