Merge da SC: fixato namespace dell'include guard

[bertos.git] / cpu.h

diff --git a/cpu.h b/cpu.h
index c8a242f22645931af2252572d9ed3d8027a21d46..096a5563e5f39b97d61a73d82436b07b266c767b 100755 (executable)
--- a/cpu.h
+++ b/cpu.h
@@ -17,6 +17,13 @@
 
 /*
  * $Log$
+ * Revision 1.10  2004/08/02 20:20:29  aleph
+ * Merge from project_ks
+ *
+ * Revision 1.9  2004/07/30 14:24:16  rasky
+ * Task switching con salvataggio perfetto stato di interrupt (SR)
+ * Kernel monitor per dump informazioni su stack dei processi
+ *
  * Revision 1.8  2004/07/30 14:15:53  rasky
  * Nuovo supporto unificato per detect della CPU
  *
@@ -48,15 +55,12 @@
 #include "compiler.h"
 
 
-//! Initialization value for registers in stack frame
-#define CPU_REG_INIT_VALUE(reg)     0
-
-// Macros for determining CPU endianess
+// Macros for determining CPU endianness
 #define CPU_BIG_ENDIAN    0x1234
 #define CPU_LITTLE_ENDIAN 0x3412
 
 // Macros to include cpu-specific version of the headers
-#define CPU_HEADER(module)          PP_STRINGIZE(PP_CAT4(module, _, CPU_ID, .h))
+#define CPU_HEADER(module)          PP_STRINGIZE(PP_CAT3(module, _, CPU_ID).h)
 
 
 #if CPU_I196
@@ -102,26 +106,12 @@
        typedef unsigned int cpustack_t;
 
        #define CPU_REGS_CNT            FIXME
-       #define CPU_SAVED_REGS_CNT      28
+       #define CPU_SAVED_REGS_CNT      8
        #define CPU_STACK_GROWS_UPWARD  1
        #define CPU_SP_ON_EMPTY_SLOT    0
        #define CPU_BYTE_ORDER          CPU_BIG_ENDIAN
 
-       #undef CPU_REG_INIT_VALUE
-       INLINE uint16_t CPU_REG_INIT_VALUE(int reg)
-       {
-               if (reg == 14)
-               {
-                       uint16_t omr_img;
-                       asm(move OMR, omr_img);
-                       return omr_img & (BV(3)/*EX*/ | BV(1)/*MB*/ | BV(0)/*MA*/);
-               }
-               else if (reg == 16)/*M01*/
-                       return 0xFFFF;
-               return 0;
-       }
-
-#elif defined (__AVR__)
+#elif CPU_AVR
 
        #define NOP                     asm volatile ("nop" ::)
        #define DISABLE_INTS            asm volatile ("cli" ::)
@@ -146,11 +136,27 @@
        typedef uint8_t cpuflags_t;
        typedef uint8_t cpustack_t;
 
-       #define CPU_REGS_CNT            32
-       #define CPU_SAVED_REGS_CNT      18
+       /* Register counts include SREG too */
+       #define CPU_REGS_CNT            33
+       #define CPU_SAVED_REGS_CNT      19
        #define CPU_STACK_GROWS_UPWARD  0
        #define CPU_SP_ON_EMPTY_SLOT    1
        #define CPU_BYTE_ORDER          CPU_LITTLE_ENDIAN
+
+       /*!
+        * Initialization value for registers in stack frame.
+        * The register index is not directly corrispondent to CPU
+        * register numbers. Index 0 is the SREG register: the initial
+        * value is all 0 but the interrupt bit (bit 7).
+        */
+       #define CPU_REG_INIT_VALUE(reg) (reg == 0 ? 0x80 : 0)
+
+#endif
+
+
+//! Default for macro not defined in the right arch section
+#ifndef CPU_REG_INIT_VALUE
+       #define CPU_REG_INIT_VALUE(reg)     0
 #endif
 
 
@@ -205,10 +211,10 @@
        #define CPU_PUSH_CALL_CONTEXT(sp, func) \
                do { \
                        CPU_PUSH_WORD((sp), (func)); \
-                       CPU_PUSH_WORD((sp), 0); \
+                       CPU_PUSH_WORD((sp), 0x100); \
                } while (0);
 
-#elif defined (__AVR__)
+#elif CPU_AVR
        /* In AVR, the addresses are pushed into the stack as little-endian, while
         * memory accesses are big-endian (actually, it's a 8-bit CPU, so there is
         * no natural endianess).