Really make it work on both architectures.
[bertos.git] / cpu.h
diff --git a/cpu.h b/cpu.h
index a8a0766ae959e9edb319c3a86d33577d910ed27b..1c8a62f387df5f85d449142958f491d09b84ce8d 100755 (executable)
--- a/cpu.h
+++ b/cpu.h
 
 /*#*
  *#* $Log$
+ *#* Revision 1.28  2004/12/31 17:39:41  bernie
+ *#* Fix documentation.
+ *#*
+ *#* Revision 1.27  2004/12/31 17:02:47  bernie
+ *#* IRQ_SAVE_DISABLE(), IRQ_RESTORE(): Add null stubs for x86.
+ *#*
+ *#* Revision 1.26  2004/12/13 12:08:12  bernie
+ *#* DISABLE_IRQSAVE, ENABLE_IRQRESTORE, DISABLE_INTS, ENABLE_INTS: Remove obsolete macros.
+ *#*
  *#* Revision 1.25  2004/12/08 08:31:02  bernie
  *#* CPU_HARVARD: Define to 1 for AVR and DSP56K.
  *#*
@@ -69,7 +78,7 @@
 #ifndef DEVLIB_CPU_H
 #define DEVLIB_CPU_H
 
-#include "compiler.h" /* for uintXX_t, PP_CAT3(), PP_STRINGIZE() */
+#include "compiler.h" /* for uintXX_t */
 
 
 /*!
        #define NOP                     asm volatile ("nop")
        #define IRQ_DISABLE             /* nothing */
        #define IRQ_ENABLE              /* nothing */
+       #define IRQ_SAVE_DISABLE(x)     /* nothing */
+       #define IRQ_RESTORE(x)          /* nothing */
 
        typedef uint32_t cpuflags_t; // FIXME
        typedef uint32_t cpustack_t;
 
 #endif
 
-/* OBSOLETE NAMES */
-#define DISABLE_INTS         IRQ_DISABLE
-#define ENABLE_INTS          IRQ_ENABLE
-#define DISABLE_IRQSAVE(x)   IRQ_SAVE_DISABLE(x)
-#define ENABLE_IRQRESTORE(x) IRQ_RESTORE(x)
-
 /*!
  * Execute \a CODE atomically with respect to interrupts.
  *
- * \see ENABLE_IRQSAVE DISABLE_IRQRESTORE
+ * \see IRQ_SAVE_DISABLE IRQ_RESTORE
  */
 #define ATOMIC(CODE) \
        do { \
                cpuflags_t __flags; \
-               DISABLE_IRQSAVE(__flags); \
+               IRQ_SAVE_DISABLE(__flags); \
                CODE; \
-               ENABLE_IRQRESTORE(__flags); \
+               IRQ_RESTORE(__flags); \
        } while (0)
 
 
@@ -374,7 +379,7 @@ STATIC_ASSERT(sizeof(int) == SIZEOF_INT);
 
 
 /*!
- * \def SCHEDULER_IDLE
+ * \def CPU_IDLE
  *
  * \brief Invoked by the scheduler to stop the CPU when idle.
  *