* \version $Id$
*
* \author Giovanni Bajo <rasky@develer.com>
+ * \author Bernardo Innocenti <bernie@develer.com>
+ * \author Stefano Fedrigo <aleph@develer.com>
*/
/*
* $Log$
+ * Revision 1.8 2004/07/30 14:15:53 rasky
+ * Nuovo supporto unificato per detect della CPU
+ *
+ * Revision 1.7 2004/07/20 23:26:48 bernie
+ * Fix two errors introduced by previous commit.
+ *
+ * Revision 1.6 2004/07/20 23:12:16 bernie
+ * Rationalize and document SCHEDULER_IDLE.
+ *
+ * Revision 1.5 2004/07/20 16:20:35 bernie
+ * Move byte-order macros to mware/byteorder.h; Add missing author names.
+ *
* Revision 1.4 2004/07/20 16:06:04 bernie
* Add macros to handle endianess issues.
*
#include "compiler.h"
+
//! Initialization value for registers in stack frame
#define CPU_REG_INIT_VALUE(reg) 0
-// Macros for determining CPU endianness
+// Macros for determining CPU endianess
#define CPU_BIG_ENDIAN 0x1234
#define CPU_LITTLE_ENDIAN 0x3412
+// Macros to include cpu-specific version of the headers
+#define CPU_HEADER(module) PP_STRINGIZE(PP_CAT4(module, _, CPU_ID, .h))
+
-#if defined(__IAR_SYSTEMS_ICC) || defined(__IAR_SYSTEMS_ICC__) /* 80C196 */
+#if CPU_I196
#define DISABLE_INTS disable_interrupt()
#define ENABLE_INTS enable_interrupt()
#define NOP nop_instruction()
- #define SCHEDULER_IDLE /* Hmmm... could we go in STOP mode? */
typedef uint16_t cpuflags_t; // FIXME
typedef unsigned int cpustack_t;
#define CPU_SP_ON_EMPTY_SLOT 0
#define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
-#elif defined(__i386__) || defined(_MSC_VER) /* x86 */
+#elif CPU_X86
#define NOP asm volatile ("nop")
#define DISABLE_INTS /* nothing */
#define ENABLE_INTS /* nothing */
- #define SCHEDULER_IDLE SchedulerIdle()
typedef uint32_t cpuflags_t; // FIXME
typedef uint32_t cpustack_t;
#define CPU_SP_ON_EMPTY_SLOT 0
#define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
-#elif defined(__m56800E__) || defined(__m56800__) /* DSP56K */
+#elif CPU_DSP56K
#define NOP asm(nop)
#define DISABLE_INTS do { asm(bfset #0x0200,SR); asm(nop); } while (0)
#define ENABLE_INTS do { asm(bfclr #0x0200,SR); asm(nop); } while (0)
- #define SCHEDULER_IDLE /* nothing */
#define DISABLE_IRQSAVE(x) \
do { asm(move SR,x); asm(bfset #0x0200,SR); } while (0)
#define NOP asm volatile ("nop" ::)
#define DISABLE_INTS asm volatile ("cli" ::)
#define ENABLE_INTS asm volatile ("sei" ::)
- #define SCHEDULER_IDLE /* nothing */
#define DISABLE_IRQSAVE(x) \
do { \
#define CPU_STACK_GROWS_UPWARD 0
#define CPU_SP_ON_EMPTY_SLOT 1
#define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
-#else
- #error Unknown CPU
#endif
#endif
-#if defined(__m56800E__) || defined(__m56800__)
+#if CPU_DSP56K
/* DSP56k pushes both PC and SR to the stack in the JSR instruction, but
* RTS discards SR while returning (it does not restore it). So we push
* 0 to fake the same context.
#endif
-INLINE uint16_t htobe16(uint16_t n);
-INLINE uint16_t htobe16(uint16_t n)
-{
- if (CPU_BYTE_ORDER == CPU_LITTLE_ENDIAN)
- n = n << 8 | n >> 8;
-
- return n;
-}
-
-INLINE uint16_t htole16(uint16_t n);
-INLINE uint16_t htole16(uint16_t n)
-{
- if (CPU_BYTE_ORDER == CPU_BIG_ENDIAN)
- n = n << 8 | n >> 8;
-
- return n;
-}
+/*!
+ * \name SCHEDULER_IDLE
+ *
+ * \brief Invoked by the scheduler to stop the CPU when idle.
+ *
+ * This hook can be redefined to put the CPU in low-power mode, or to
+ * profile system load with an external strobe, or to save CPU cycles
+ * in hosted environments such as emulators.
+ */
+#ifndef SCHEDULER_IDLE
+ #if defined(ARCH_EMUL) && (ARCH & ARCH_EMUL)
+ /* This emulator hook should yeld the CPU to the host. */
+ EXTERN_C_BEGIN
+ void SchedulerIdle(void);
+ EXTERN_C_END
+ #else /* !ARCH_EMUL */
+ #define SCHEDULER_IDLE /* nothing */
+ #endif /* !ARCH_EMUL */
+#endif /* !SCHEDULER_IDLE */
#endif /* CPU_H */