-/*!
+/**
* \file
* <!--
- * Copyright 2003, 2004 Develer S.r.l. (http://www.develer.com/)
- * All Rights Reserved.
- * -->
+ * This file is part of BeRTOS.
*
- * \version $Id$
+ * Bertos is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
*
- * \author Stefano Fedrigo <aleph@develer.com>
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
*
- * \brief I2C eeprom driver
- */
-
-/*
- * $Log$
- * Revision 1.1 2004/07/20 17:11:18 bernie
- * Import into DevLib.
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ *
+ * As a special exception, you may use this file as part of a free software
+ * library without restriction. Specifically, if other files instantiate
+ * templates or use macros or inline functions from this file, or you compile
+ * this file and link it with other files to produce an executable, this
+ * file does not by itself cause the resulting executable to be covered by
+ * the GNU General Public License. This exception does not however
+ * invalidate any other reasons why the executable file might be covered by
+ * the GNU General Public License.
+ *
+ * Copyright 2003, 2004, 2005 Develer S.r.l. (http://www.develer.com/)
*
+ * -->
+ *
+ * \brief Driver for the 24xx16 and 24xx256 I2C EEPROMS (implementation)
+ *
+ * \note This implementation is AVR specific.
+ *
+ * \version $Id$
+ * \author Stefano Fedrigo <aleph@develer.com>
+ * \author Bernardo Innocenti <bernie@develer.com>
*/
#include "eeprom.h"
-#include <mware/byteorder.h> /* cpu_to_be16() */
-#include <drv/kdebug.h>
-#include <hw.h>
-
-#include <avr/twi.h>
+#include <cfg/debug.h>
+#include <appconfig.h> // CONFIG_EEPROM_VERIFY
+#include <cfg/macros.h> // MIN()
+#include <cpu/attr.h>
+#include CPU_HEADER(twi)
+#include <drv/wdt.h>
+#include <mware/byteorder.h> // cpu_to_be16()
-/* Wait for TWINT flag set: bus is ready */
-#define WAIT_TWI_READY do {} while (!(TWCR & BV(TWINT)))
+#include <string.h> // memset()
-/*! \name EEPROM control codes */
-/*@{*/
-#define SLA_W 0xA0
-#define SLA_R 0xA1
-/*@}*/
+// Configuration sanity checks
+#if !defined(CONFIG_EEPROM_VERIFY) || (CONFIG_EEPROM_VERIFY != 0 && CONFIG_EEPROM_VERIFY != 1)
+ #error CONFIG_EEPROM_VERIFY must be defined to either 0 or 1
+#endif
-/*!
- * Send START condition on the bus.
- *
- * \return true on success, false otherwise.
+/**
+ * EEPROM ID code
*/
-static bool twi_start(void)
-{
- TWCR = BV(TWINT) | BV(TWSTA) | BV(TWEN);
- WAIT_TWI_READY;
-
- if (TW_STATUS == TW_START || TW_STATUS == TW_REP_START)
- return true;
-
- DB(kprintf("!TW_(REP)START: %x\n", TWSR);)
- return false;
-}
-
+#define EEPROM_ID 0xA0
-/*!
- * Send START condition and select slave for write.
- *
- * \return true on success, false otherwise.
+/**
+ * This macros form the correct slave address for EEPROMs
*/
-static bool twi_start_w(uint8_t slave_addr)
-{
- //TRACE;
+#define EEPROM_ADDR(x) (EEPROM_ID | (((uint8_t)(x)) << 1))
- /* Do a loop on the select write sequence because if the
- * eeprom is busy writing precedently sent data it will respond
- * with NACK to the SLA_W control byte. In this case we have
- * to try until the eeprom reply with an ACK.
- */
- while (twi_start())
- {
- TWDR = SLA_W | ((slave_addr & 0x5) << 1);
- TWCR = BV(TWINT) | BV(TWEN);
- WAIT_TWI_READY;
- if (TW_STATUS == TW_MT_SLA_ACK)
- return true;
- else if (TW_STATUS != TW_MT_SLA_NACK)
- {
- DB(kprintf("!TW_MT_SLA_(N)ACK: %x\n", TWSR);)
- break;
- }
- }
-
- return false;
-}
-
-
-/*!
- * Send START condition and select slave for read.
- *
- * \return true on success, false otherwise.
- */
-static bool twi_start_r(uint8_t slave_addr)
-{
- //TRACE;
-
- if (twi_start())
- {
- TWDR = SLA_R | ((slave_addr & 0x5) << 1);
- TWCR = BV(TWINT) | BV(TWEN);
- WAIT_TWI_READY;
-
- if (TW_STATUS == TW_MR_SLA_ACK)
- return true;
- DB(kprintf("!TW_MR_SLA_ACK: %x\n", TWSR);)
- }
- return false;
-}
-
-
-/*!
- * Send STOP condition.
- */
-static void twi_stop(void)
-{
- //TRACE;
-
- TWCR = BV(TWINT) | BV(TWEN) | BV(TWSTO);
-}
-
-
-/*!
- * Send a sequence of bytes in master transmitter mode
- * to the selected slave device through the TWI bus.
- *
- * \return true on success, false on error.
+/**
+ * Copy \c count bytes from buffer \c buf to
+ * eeprom at address \c addr.
*/
-static bool twi_send(const uint8_t *buf, size_t count)
+static bool eeprom_writeRaw(e2addr_t addr, const void *buf, size_t count)
{
- //TRACE;
+ bool result = true;
+ ASSERT(addr + count <= EEPROM_SIZE);
- while (count--)
+ while (count && result)
{
- TWDR = *buf++;
- TWCR = BV(TWINT) | BV(TWEN);
- WAIT_TWI_READY;
- if (TW_STATUS != TW_MT_DATA_ACK)
- {
- DB(kprintf("!TW_MT_DATA_ACK: %x\n", TWSR);)
- return false;
- }
+ /*
+ * Split write in multiple sequential mode operations that
+ * don't cross page boundaries.
+ */
+ size_t size =
+ MIN(count, (size_t)(EEPROM_BLKSIZE - (addr & (EEPROM_BLKSIZE - 1))));
+
+ #if CONFIG_EEPROM_TYPE == EEPROM_24XX16
+ /*
+ * The 24LC16 uses the slave address as a 3-bit
+ * block address.
+ */
+ uint8_t blk_addr = (uint8_t)((addr >> 8) & 0x07);
+ uint8_t blk_offs = (uint8_t)addr;
+
+ result =
+ twi_start_w(EEPROM_ADDR(blk_addr))
+ && twi_send(&blk_offs, sizeof blk_offs)
+ && twi_send(buf, size);
+
+ #elif CONFIG_EEPROM_TYPE == EEPROM_24XX256
+
+ // 24LC256 wants big-endian addresses
+ uint16_t addr_be = cpu_to_be16(addr);
+
+ result =
+ twi_start_w(EEPROM_ID)
+ && twi_send((uint8_t *)&addr_be, sizeof addr_be)
+ && twi_send(buf, size);
+
+ #else
+ #error Unknown device type
+ #endif
+
+ twi_stop();
+
+ // DEBUG
+ //kprintf("addr=%d, count=%d, size=%d, *#?=%d\n",
+ // addr, count, size,
+ // (EEPROM_BLKSIZE - (addr & (EEPROM_BLKSIZE - 1)))
+ //);
+
+ /* Update count and addr for next operation */
+ count -= size;
+ addr += size;
+ buf = ((const char *)buf) + size;
}
- return true;
+ if (!result)
+ TRACEMSG("Write error!");
+ return result;
}
-/*!
- * Receive a sequence of one or more bytes from the
- * selected slave device in master receive mode through
- * the TWI bus.
+#if CONFIG_EEPROM_VERIFY
+/**
+ * Check that the contents of an EEPROM range
+ * match with a provided data buffer.
*
- * Received data is placed in \c buf.
- *
- * \return true on success, false on error
+ * \return true on success.
*/
-static bool twi_recv(uint8_t *buf, size_t count)
+static bool eeprom_verify(e2addr_t addr, const void *buf, size_t count)
{
- //TRACE;
+ uint8_t verify_buf[16];
+ bool result = true;
- /*
- * When reading the last byte the TWEA bit is not
- * set, and the eeprom should answer with NACK
- */
- while (count--)
+ while (count && result)
{
- TWCR = BV(TWINT) | BV(TWEN) | (count ? BV(TWEA) : 0);
- WAIT_TWI_READY;
+ /* Split read in smaller pieces */
+ size_t size = MIN(count, sizeof verify_buf);
- if (count)
+ /* Read back buffer */
+ if (eeprom_read(addr, verify_buf, size))
{
- if (TW_STATUS != TW_MR_DATA_ACK)
+ if (memcmp(buf, verify_buf, size) != 0)
{
- DB(kprintf("!TW_MR_DATA_ACK: %x\n", TWSR);)
- return false;
+ TRACEMSG("Data mismatch!");
+ result = false;
}
}
else
{
- if (TW_STATUS != TW_MR_DATA_NACK)
- {
- DB(kprintf("!TW_MR_DATA_NACK: %x\n", TWSR);)
- return false;
- }
+ TRACEMSG("Read error!");
+ result = false;
}
- *buf++ = TWDR;
+
+ /* Update count and addr for next operation */
+ count -= size;
+ addr += size;
+ buf = ((const char *)buf) + size;
}
- return true;
+ return result;
}
+#endif /* CONFIG_EEPROM_VERIFY */
-/*!
- * Copy \c count bytes from buffer \c buf to
- * eeprom at address \c addr.
- *
- * \note No check is done for data crossing page
- * boundaries.
- */
bool eeprom_write(e2addr_t addr, const void *buf, size_t count)
{
- // eeprom accepts address as big endian
- addr = cpu_to_be16(addr);
+#if CONFIG_EEPROM_VERIFY
+ int retries = 5;
- bool res =
- twi_start_w(0)
- && twi_send((uint8_t *)&addr, sizeof(addr))
- && twi_send(buf, count);
+ while (retries--)
+ if (eeprom_writeRaw(addr, buf, count)
+ && eeprom_verify(addr, buf, count))
+ return true;
- twi_stop();
+ return false;
- return res;
+#else /* !CONFIG_EEPROM_VERIFY */
+ return eeprom_writeRaw(addr, buf, count);
+#endif /* !CONFIG_EEPROM_VERIFY */
}
-/*!
+/**
* Copy \c count bytes at address \c addr
* from eeprom to RAM to buffer \c buf.
+ *
+ * \return true on success.
*/
bool eeprom_read(e2addr_t addr, void *buf, size_t count)
{
- // eeprom accepts address as big endian
+ ASSERT(addr + count <= EEPROM_SIZE);
+
+#if CONFIG_EEPROM_TYPE == EEPROM_24XX16
+ /*
+ * The 24LC16 uses the slave address as a 3-bit
+ * block address.
+ */
+ uint8_t blk_addr = (uint8_t)((addr >> 8) & 0x07);
+ uint8_t blk_offs = (uint8_t)addr;
+
+ bool res =
+ twi_start_w(EEPROM_ADDR(blk_addr))
+ && twi_send(&blk_offs, sizeof blk_offs)
+ && twi_start_r(EEPROM_ADDR(blk_addr))
+ && twi_recv(buf, count);
+
+#elif CONFIG_EEPROM_TYPE == EEPROM_24XX256
+
+ // 24LC256 wants big-endian addresses
addr = cpu_to_be16(addr);
bool res =
- twi_start_w(0)
+ twi_start_w(EEPROM_ID)
&& twi_send((uint8_t *)&addr, sizeof(addr))
- && twi_start_r(0)
+ && twi_start_r(EEPROM_ID)
&& twi_recv(buf, count);
+#else
+ #error Unknown device type
+#endif
twi_stop();
+ if (!res)
+ TRACEMSG("Read error!");
return res;
}
-/*!
+/**
* Write a single character \a c at address \a addr.
*/
bool eeprom_write_char(e2addr_t addr, char c)
}
-/*!
+/**
* Read a single character at address \a addr.
*
* \return the requested character or -1 in case of failure.
}
-/*!
- * Initialize TWI module.
+/**
+ * Erase specified part of eeprom, writing 0xFF.
+ *
+ * \param addr starting address
+ * \param count length of block to erase
*/
-void eeprom_init(void)
+void eeprom_erase(e2addr_t addr, size_t count)
{
- cpuflags_t flags;
- DISABLE_IRQSAVE(flags);
+ uint8_t buf[EEPROM_BLKSIZE];
+ memset(buf, 0xFF, sizeof buf);
- DDRD |= BV(PORTD0) | BV(PORTD1);
- PORTD |= BV(PORTD0) | BV(PORTD1);
+ // Clear all but struct hw_info at start of eeprom
+ while (count)
+ {
+ // Long operation, reset watchdog
+ wdt_reset();
- /*
- * Set speed:
- * F = CLOCK_FREQ / (16 + 2*TWBR * 4^TWPS)
- */
-# define TWI_FREQ 300000 /* 300 kHz */
-# define TWI_PRESC 1 /* 4 ^ TWPS */
+ size_t size = MIN(count, sizeof buf);
+ eeprom_write(addr, buf, size);
+ addr += size;
+ count -= size;
+ }
+}
- TWBR = (CLOCK_FREQ / (2 * TWI_FREQ * TWI_PRESC)) - (8 / TWI_PRESC);
- TWSR = 0;
- ENABLE_IRQRESTORE(flags);
+/**
+ * Initialize TWI module.
+ */
+void eeprom_init(void)
+{
+ twi_init();
}
#ifdef _DEBUG
+#include <string.h>
+
void eeprom_test(void)
{
- static const char magic[] = "Humpty Dumpty";
+ static const char magic[14] = "Humpty Dumpty";
char buf[sizeof magic];
+ size_t i;
+
+ // Write something to EEPROM using unaligned sequential writes
+ for (i = 0; i < 42; ++i)
+ {
+ wdt_reset();
+ eeprom_write(i * sizeof magic, magic, sizeof magic);
+ }
- // Write something to EEPROM and read it back
- eeprom_write(0, magic, sizeof magic);
- eeprom_read(0, buf, sizeof buf);
- kprintf("EEPROM read: %s\n", buf);
+ // Read back with single-byte reads
+ for (i = 0; i < 42 * sizeof magic; ++i)
+ {
+ wdt_reset();
+ eeprom_read(i, buf, 1);
+ kprintf("EEPROM byte read: %c (%d)\n", buf[0], buf[0]);
+ ASSERT(buf[0] == magic[i % sizeof magic]);
+ }
+
+ // Read back again using sequential reads
+ for (i = 0; i < 42; ++i)
+ {
+ wdt_reset();
+ memset(buf, 0, sizeof buf);
+ eeprom_read(i * sizeof magic, buf, sizeof magic);
+ kprintf("EEPROM seq read @ 0x%x: '%s'\n", i * sizeof magic, buf);
+ ASSERT(memcmp(buf, magic, sizeof magic) == 0);
+ }
}
#endif // _DEBUG
-
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