/*!
* \file
* <!--
- * Copyright 2003, 2004 Develer S.r.l. (http://www.develer.com/)
- * This file is part of DevLib - See devlib/README for information.
+ * Copyright 2003, 2004, 2005 Develer S.r.l. (http://www.develer.com/)
+ * This file is part of DevLib - See README.devlib for information.
* -->
*
* \brief Driver for the 24xx16 and 24xx256 I2C EEPROMS (implementation)
/*#*
*#* $Log$
- *#* Revision 1.12 2004/11/02 17:50:01 bernie
- *#* CONFIG_EEPROM_VERIFY: New config option.
+ *#* Revision 1.17 2005/04/11 19:10:27 bernie
+ *#* Include top-level headers from cfg/ subdir.
+ *#*
+ *#* Revision 1.16 2005/03/01 23:25:09 bernie
+ *#* Prune CVS log.
*#*
*#* Revision 1.11 2004/10/26 08:35:31 bernie
*#* Reset watchdog for long operations.
*#*
*#* Revision 1.9 2004/09/14 21:03:46 bernie
*#* Use debug.h instead of kdebug.h.
- *#*
- *#* Revision 1.8 2004/08/25 14:12:08 rasky
- *#* Aggiornato il comment block dei log RCS
- *#*
- *#* Revision 1.7 2004/08/24 16:48:40 bernie
- *#* Note reason for including <macros.h>
- *#*
- *#* Revision 1.6 2004/08/24 14:27:20 bernie
- *#* Doxygen fix.
- *#*
- *#* Revision 1.5 2004/08/24 13:46:48 bernie
- *#* Include <macros.h>.
- *#*
- *#* Revision 1.4 2004/08/10 06:57:22 bernie
- *#* eeprom_erase(): New function.
- *#*
- *#* Revision 1.3 2004/07/29 22:57:09 bernie
- *#* Add 24LC16 support.
- *#*
- *#* Revision 1.2 2004/07/22 01:24:43 bernie
- *#* Document AVR dependency.
- *#*
- *#* Revision 1.1 2004/07/20 17:11:18 bernie
- *#* Import into DevLib.
- *#*
*#*/
#include "eeprom.h"
+#include <cfg/debug.h>
+#include <cfg/config.h> // CONFIG_EEPROM_VERIFY
+#include <cfg/macros.h> // MIN()
+#include <drv/twi.h>
#include <drv/wdt.h>
-#include <mware/byteorder.h> /* cpu_to_be16() */
-#include <debug.h>
-#include <hw.h>
-#include <config.h> // CONFIG_EEPROM_VERIFY
-#include <macros.h> // MIN()
+#include <mware/byteorder.h> // cpu_to_be16()
#include <string.h> // memset()
-#include <avr/twi.h>
// Configuration sanity checks
#if !defined(CONFIG_EEPROM_VERIFY) || (CONFIG_EEPROM_VERIFY != 0 && CONFIG_EEPROM_VERIFY != 1)
#endif
-/* Wait for TWINT flag set: bus is ready */
-#define WAIT_TWI_READY do {} while (!(TWCR & BV(TWINT)))
-
-/*! \name EEPROM control codes */
-/*@{*/
-#define SLA_W 0xA0
-#define SLA_R 0xA1
-/*@}*/
-
-
-/*!
- * Send START condition on the bus.
- *
- * \return true on success, false otherwise.
- */
-static bool twi_start(void)
-{
- TWCR = BV(TWINT) | BV(TWSTA) | BV(TWEN);
- WAIT_TWI_READY;
-
- if (TW_STATUS == TW_START || TW_STATUS == TW_REP_START)
- return true;
-
- DB(kprintf("!TW_(REP)START: %x\n", TWSR);)
- return false;
-}
-
-
-/*!
- * Send START condition and select slave for write.
- *
- * \return true on success, false otherwise.
- */
-static bool twi_start_w(uint8_t slave_addr)
-{
- ASSERT(slave_addr < 8);
-
- /*
- * Loop on the select write sequence: when the eeprom is busy
- * writing previously sent data it will reply to the SLA_W
- * control byte with a NACK. In this case, we must
- * keep trying until the eeprom responds with an ACK.
- */
- while (twi_start())
- {
- TWDR = SLA_W | (slave_addr << 1);
- TWCR = BV(TWINT) | BV(TWEN);
- WAIT_TWI_READY;
-
- if (TW_STATUS == TW_MT_SLA_ACK)
- return true;
- else if (TW_STATUS != TW_MT_SLA_NACK)
- {
- DB(kprintf("!TW_MT_SLA_(N)ACK: %x\n", TWSR);)
- break;
- }
- }
-
- return false;
-}
-
-
-/*!
- * Send START condition and select slave for read.
- *
- * \return true on success, false otherwise.
- */
-static bool twi_start_r(uint8_t slave_addr)
-{
- ASSERT(slave_addr < 8);
-
- if (twi_start())
- {
- TWDR = SLA_R | (slave_addr << 1);
- TWCR = BV(TWINT) | BV(TWEN);
- WAIT_TWI_READY;
-
- if (TW_STATUS == TW_MR_SLA_ACK)
- return true;
-
- DB(kprintf("!TW_MR_SLA_ACK: %x\n", TWSR);)
- }
-
- return false;
-}
-
-
-/*!
- * Send STOP condition.
- */
-static void twi_stop(void)
-{
- TWCR = BV(TWINT) | BV(TWEN) | BV(TWSTO);
-}
-
-
-/*!
- * Send a sequence of bytes in master transmitter mode
- * to the selected slave device through the TWI bus.
- *
- * \return true on success, false on error.
- */
-static bool twi_send(const void *_buf, size_t count)
-{
- const uint8_t *buf = (const uint8_t *)_buf;
-
- while (count--)
- {
- TWDR = *buf++;
- TWCR = BV(TWINT) | BV(TWEN);
- WAIT_TWI_READY;
- if (TW_STATUS != TW_MT_DATA_ACK)
- {
- DB(kprintf("!TW_MT_DATA_ACK: %x\n", TWSR);)
- return false;
- }
- }
-
- return true;
-}
-
-
-/*!
- * Receive a sequence of one or more bytes from the
- * selected slave device in master receive mode through
- * the TWI bus.
- *
- * Received data is placed in \c buf.
- *
- * \return true on success, false on error
- */
-static bool twi_recv(void *_buf, size_t count)
-{
- uint8_t *buf = (uint8_t *)_buf;
-
- /*
- * When reading the last byte the TWEA bit is not
- * set, and the eeprom should answer with NACK
- */
- while (count--)
- {
- TWCR = BV(TWINT) | BV(TWEN) | (count ? BV(TWEA) : 0);
- WAIT_TWI_READY;
-
- if (count)
- {
- if (TW_STATUS != TW_MR_DATA_ACK)
- {
- DB(kprintf("!TW_MR_DATA_ACK: %x\n", TWSR);)
- return false;
- }
- }
- else
- {
- if (TW_STATUS != TW_MR_DATA_NACK)
- {
- DB(kprintf("!TW_MR_DATA_NACK: %x\n", TWSR);)
- return false;
- }
- }
- *buf++ = TWDR;
- }
-
- return true;
-}
-
/*!
* Copy \c count bytes from buffer \c buf to
* eeprom at address \c addr.
buf = ((const char *)buf) + size;
}
+ if (!result)
+ TRACEMSG("Write error!");
return result;
}
/*!
* Check that the contents of an EEPROM range
* match with a provided data buffer.
+ *
+ * \return true on success.
*/
static bool eeprom_verify(e2addr_t addr, const void *buf, size_t count)
{
{
if (memcmp(buf, verify_buf, size) != 0)
{
- TRACEMSG("Data mismatch!\n");
+ TRACEMSG("Data mismatch!");
result = false;
}
}
else
{
- TRACEMSG("Read error!\n");
+ TRACEMSG("Read error!");
result = false;
}
twi_stop();
+ if (!res)
+ TRACEMSG("Read error!");
return res;
}
*/
void eeprom_init(void)
{
- cpuflags_t flags;
- DISABLE_IRQSAVE(flags);
-
-#if defined(__AVR_ATmega64__)
- PORTD |= BV(PD0) | BV(PD1);
- DDRD |= BV(PD0) | BV(PD1);
-#elif defined(__AVR_ATmega8__)
- PORTC |= BV(PC4) | BV(PC5);
- DDRC |= BV(PC4) | BV(PC5);
-#else
- #error Unsupported architecture
-#endif
-
- /*
- * Set speed:
- * F = CLOCK_FREQ / (16 + 2*TWBR * 4^TWPS)
- */
- #define TWI_FREQ 300000 /* 300 kHz */
- #define TWI_PRESC 1 /* 4 ^ TWPS */
-
- TWBR = (CLOCK_FREQ / (2 * TWI_FREQ * TWI_PRESC)) - (8 / TWI_PRESC);
- TWSR = 0;
- TWCR = BV(TWEN);
-
- ENABLE_IRQRESTORE(flags);
+ twi_init();
}
// Write something to EEPROM using unaligned sequential writes
for (i = 0; i < 42; ++i)
+ {
+ wdt_reset();
eeprom_write(i * sizeof magic, magic, sizeof magic);
+ }
// Read back with single-byte reads
for (i = 0; i < 42 * sizeof magic; ++i)
{
+ wdt_reset();
eeprom_read(i, buf, 1);
kprintf("EEPROM byte read: %c (%d)\n", buf[0], buf[0]);
ASSERT(buf[0] == magic[i % sizeof magic]);
// Read back again using sequential reads
for (i = 0; i < 42; ++i)
{
+ wdt_reset();
memset(buf, 0, sizeof buf);
eeprom_read(i * sizeof magic, buf, sizeof magic);
kprintf("EEPROM seq read @ 0x%x: '%s'\n", i * sizeof magic, buf);
projects / bertos.git / blobdiff