/*
* $Log$
+ * Revision 1.10 2004/08/04 15:57:50 rasky
+ * Cambiata la putchar per kdebug per DSP56k: la nuova funzione e' quella piu' a basso livello (assembly)
+ *
+ * Revision 1.9 2004/08/02 20:20:29 aleph
+ * Merge from project_ks
+ *
+ * Revision 1.8 2004/07/30 14:26:33 rasky
+ * Semplificato l'output dell'ASSERT
+ * Aggiunta ASSERT2 con stringa di help opzionalmente disattivabile
+ *
+ * Revision 1.7 2004/07/30 14:15:53 rasky
+ * Nuovo supporto unificato per detect della CPU
+ *
* Revision 1.6 2004/07/18 21:49:28 bernie
* Add ATmega8 support.
*
#define KDBG_WRITE_CHAR(c) putchar((c))
#define KDBG_MASK_IRQ(old) do {/*nop*/} while(0)
#define KDBG_RESTORE_IRQ() do {/*nop*/} while(0)
-#elif defined(__I196__)
+#elif CPU_I196
#include "Util196.h"
#define KDBG_WAIT_READY() do {} while (!(SP_STAT & (SPSF_TX_EMPTY | SPSF_TX_INT)))
#define KDBG_WRITE_CHAR(c) do { SBUF = (c); } while(0)
INT_MASK1 &= ~INT1F_TI; \
} while(0)
#define KDBG_RESTORE_IRQ(old) do { INT_MASK1 |= (old); }
-#elif defined(__AVR__)
+#elif CPU_AVR
#include <avr/io.h>
#if CONFIG_KDEBUG_PORT == 0
+
+ /* External 485 transceiver on UART0 (to be overridden in "hw.h"). */
+ #if !defined(SER_UART0_485_INIT)
+ #if defined(SER_UART0_485_RX) || defined(SER_UART0_485_TX)
+ #error SER_UART0_485_INIT, SER_UART0_485_RX and SER_UART0_485_TX must be defined together
+ #endif
+ #define SER_UART0_485_INIT do {} while (0)
+ #define SER_UART0_485_TX do {} while (0)
+ #define SER_UART0_485_RX do {} while (0)
+ #elif !defined(SER_UART0_485_RX) || !defined(SER_UART0_485_TX)
+ #error SER_UART0_485_INIT, SER_UART0_485_RX and SER_UART0_485_TX must be defined together
+ #endif
+
#if defined(__AVR_ATmega64__)
#define UCR UCSR0B
#define UDR UDR0
#define UCR UCSRB
#define USR UCSRA
#endif
+
#define KDBG_WAIT_READY() do { loop_until_bit_is_set(USR, UDRE); } while(0)
- #define KDBG_WRITE_CHAR(c) do { UCR |= BV(TXEN); UDR = (c); } while(0)
- #define KDBG_MASK_IRQ(old) do { (old) = UCR & BV(TXCIE); cbi(UCR, TXCIE); } while(0)
- #define KDBG_RESTORE_IRQ(old) do { UCR |= (old); } while(0)
+ #define KDBG_WAIT_TXDONE() do { loop_until_bit_is_set(USR, TXC); } while(0)
+ /*
+ * BUG: before sending a new character the TXC flag is cleared to allow
+ * KDBG_WAIT_TXDONE() to work properly, but, if KDBG_WRITE_CHAR() is called
+ * after the RXC flag is set by hardware, a new TXC could be generated
+ * after we clear it and before the new character is put in UDR. In this
+ * case if a 485 is used the transceiver will be put in RX mode while
+ * transmitting the last char.
+ */
+ #define KDBG_WRITE_CHAR(c) do { USR |= BV(TXC); UDR = (c); } while(0)
+
+ #define KDBG_MASK_IRQ(old) do { \
+ SER_UART0_485_TX; \
+ (old) = UCR; \
+ UCR |= BV(TXEN); \
+ UCR &= ~(BV(TXCIE) | BV(UDRIE)); \
+ } while(0)
+
+ #define KDBG_RESTORE_IRQ(old) do { \
+ KDBG_WAIT_TXDONE(); \
+ SER_UART0_485_RX; \
+ UCR = (old); \
+ } while(0)
+
#elif CONFIG_KDEBUG_PORT == 1
+
+ /* External 485 transceiver on UART1 (to be overridden in "hw.h"). */
+ #ifndef SER_UART1_485_INIT
+ #if defined(SER_UART1_485_RX) || defined(SER_UART1_485_TX)
+ #error SER_UART1_485_INIT, SER_UART1_485_RX and SER_UART1_485_TX must be defined together
+ #endif
+ #define SER_UART1_485_INIT do {} while (0)
+ #define SER_UART1_485_TX do {} while (0)
+ #define SER_UART1_485_RX do {} while (0)
+ #elif !defined(SER_UART1_485_RX) || !defined(SER_UART1_485_TX)
+ #error SER_UART1_485_INIT, SER_UART1_485_RX and SER_UART1_485_TX must be defined together
+ #endif
+
#define KDBG_WAIT_READY() do { loop_until_bit_is_set(UCSR1A, UDRE); } while(0)
- #define KDBG_WRITE_CHAR(c) do { UCSR1B |= BV(TXEN); UDR1 = (c); } while(0)
- #define KDBG_MASK_IRQ(old) do { (old) = UCSR1B & BV(TXCIE); cbi(UCSR1B, TXCIE); } while(0)
- #define KDBG_RESTORE_IRQ(old) do { UCSR1B |= (old); } while(0)
+ #define KDBG_WAIT_TXDONE() do { loop_until_bit_is_set(UCSR1A, TXC); } while(0)
+ #define KDBG_WRITE_CHAR(c) do { UCSR1A |= BV(TXC); UDR1 = (c); } while(0)
+
+ #define KDBG_MASK_IRQ(old) do { \
+ SER_UART1_485_TX; \
+ (old) = UCSR1B; \
+ UCSR1B |= BV(TXEN); \
+ UCSR1B &= ~(BV(TXCIE) | BV(UDRIE)); \
+ } while(0)
+
+ #define KDBG_RESTORE_IRQ(old) do { \
+ KDBG_WAIT_TXDONE(); \
+ SER_UART1_485_RX; \
+ UCSR1B = (old); \
+ } while(0)
+
#else
#error CONFIG_KDEBUG_PORT should be either 0 or 1
#endif
-#elif defined(__MWERKS__) && (defined(__m56800E__) || defined(__m56800__))
+#elif defined(__MWERKS__) && CPU_DSP56K
/* Debugging go through the JTAG interface. The MSL library already
implements the console I/O correctly. */
#include <stdio.h>
#define KDBG_WAIT_READY()
- #define KDBG_WRITE_CHAR(c) do { char ch=c; fwrite(&ch,1,1,stdout); } while (0)
+ #define KDBG_WRITE_CHAR(c) __put_char(c, stdout)
#define KDBG_MASK_IRQ(old)
#define KDBG_RESTORE_IRQ(old)
#else
void kdbg_init(void)
{
-#if defined(__I196__)
+#if CPU_I196
/* Set serial port for 19200bps 8N1 */
INT_MASK1 &= ~(INT1F_TI | INT1F_RI);
BAUD_RATE = 0x33;
BAUD_RATE = 0x80;
-#elif defined(__AVR__)
+#elif CPU_AVR
/* Compute the baud rate */
uint16_t period = (((CLOCK_FREQ / 16UL) + (CONFIG_KDEBUG_BAUDRATE / 2)) / CONFIG_KDEBUG_BAUDRATE) - 1;
#if CONFIG_KDEBUG_PORT == 0
UBRR0H = (uint8_t)(period>>8);
UBRR0L = (uint8_t)period;
+ SER_UART0_485_INIT;
#elif CONFIG_KDEBUG_PORT == 1
UBRR1H = (uint8_t)(period>>8);
UBRR1L = (uint8_t)period;
+ SER_UART1_485_INIT;
#else
#error CONFIG_KDEBUG_PORT must be either 0 or 1
#endif
UBRRL = (uint8_t)period;
#elif defined(__AVR_ATmega103__)
UBRR = (uint8_t)period;
+ SER_UART0_485_INIT;
#else
#error Unknown arch
#endif
-#endif /* !__I196__ && !__AVR__ */
+#endif /* !CPU_I196 && !CPU_AVR */
kputs("\n\n*** DBG START ***\n");
}
int PGM_FUNC(__assert)(const char * PGM_ATTR cond, const char *file, int line)
{
PGM_FUNC(kputs)(file);
- PGM_FUNC(kprintf)(PSTR(":%d: Assertion failed: \""), line);
+ PGM_FUNC(kprintf)(PSTR(":%d: Assertion failed: "), line);
PGM_FUNC(kputs)(cond);
- PGM_FUNC(kputs)(PSTR("\"\n"));
+ PGM_FUNC(kputs)(PSTR("\n"));
return 1;
}
projects / bertos.git / blobdiff