/*#*
*#* $Log$
+ *#* Revision 1.19 2004/12/13 11:51:08 bernie
+ *#* DISABLE_INTS/ENABLE_INTS: Convert to IRQ_DISABLE/IRQ_ENABLE.
+ *#*
+ *#* Revision 1.18 2004/12/08 08:03:48 bernie
+ *#* Doxygen fixes.
+ *#*
+ *#* Revision 1.17 2004/10/19 07:52:35 bernie
+ *#* Reset parity bits before overwriting them (Fixed by batt in project_ks).
+ *#*
*#* Revision 1.16 2004/10/03 18:45:48 bernie
*#* Convert to new-style config macros; Allow compiling with a C++ compiler (mostly).
*#*
*
* The default is no action.
*/
+ #ifdef __doxygen__
+ #define SER_UART0_BUS_TXOFF
+ #endif
#endif
#ifndef SER_UART1_BUS_TXINIT
*
* \see SER_UART0_BUS_TXOFF
*/
+ #ifdef __doxygen__
+ #define SER_UART1_BUS_TXOFF
+ #endif
#endif
/*\}*/
static void uart0_setparity(UNUSED(struct SerialHardware *, _hw), int parity)
{
#if !CPU_AVR_ATMEGA103
- UCSR0C |= (parity) << UPM0;
+ UCSR0C = (UCSR0C & ~(BV(UPM1) | BV(UPM0))) | ((parity) << UPM0);
#endif
}
static void uart1_setparity(UNUSED(struct SerialHardware *, _hw), int parity)
{
- UCSR1C |= (parity) << UPM0;
+ UCSR1C = (UCSR1C & ~(BV(UPM1) | BV(UPM0))) | ((parity) << UPM0);
}
#endif // AVR_HAS_UART1
/* Disable Recv complete IRQ */
//UCSR0B &= ~BV(RXCIE);
- //ENABLE_INTS;
+ //IRQ_ENABLE;
/* Should be read before UDR */
ser_uart0->status |= UCSR0A & (SERRF_RXSROVERRUN | SERRF_FRAMEERROR);
}
/* Reenable receive complete int */
- //DISABLE_INTS;
+ //IRQ_DISABLE;
//UCSR0B |= BV(RXCIE);
SER_STROBE_OFF;
/* Disable Recv complete IRQ */
//UCSR1B &= ~BV(RXCIE);
- //ENABLE_INTS;
+ //IRQ_ENABLE;
/* Should be read before UDR */
ser_uart1->status |= UCSR1A & (SERRF_RXSROVERRUN | SERRF_FRAMEERROR);