* \author Stefano Fedrigo <aleph@develer.com>
*/
-/*
- * $Log$
- * Revision 1.10 2004/08/10 06:30:41 bernie
- * Major redesign of serial bus policy handling.
- *
- * Revision 1.9 2004/08/02 20:20:29 aleph
- * Merge from project_ks
- *
- * Revision 1.8 2004/07/29 22:57:09 bernie
- * Several tweaks to reduce code size on ATmega8.
- *
- * Revision 1.7 2004/07/18 21:54:23 bernie
- * Add ATmega8 support.
- *
- * Revision 1.5 2004/06/27 15:25:40 aleph
- * Add missing callbacks for SPI;
- * Change UNUSED() macro to new version with two args;
- * Use TX line filling only on the correct KBUS serial port;
- * Fix nasty IRQ disabling bug in recv complete hander for port 1.
- *
- * Revision 1.4 2004/06/03 11:27:09 bernie
- * Add dual-license information.
- *
- * Revision 1.3 2004/06/02 21:35:24 aleph
- * Serial enhancements: interruptible receive handler and 8 bit serial status for AVR; remove volatile attribute to FIFOBuffer, useless for new fifobuf routens
- *
- * Revision 1.2 2004/05/23 18:21:53 bernie
- * Trim CVS logs and cleanup header info.
- *
- */
+/*#*
+ *#* $Log$
+ *#* Revision 1.17 2004/10/19 07:52:35 bernie
+ *#* Reset parity bits before overwriting them (Fixed by batt in project_ks).
+ *#*
+ *#* Revision 1.16 2004/10/03 18:45:48 bernie
+ *#* Convert to new-style config macros; Allow compiling with a C++ compiler (mostly).
+ *#*
+ *#* Revision 1.15 2004/09/14 21:05:36 bernie
+ *#* Use debug.h instead of kdebug.h; Use new AVR pin names; Spelling fixes.
+ *#*
+ *#* Revision 1.14 2004/09/06 21:50:00 bernie
+ *#* Spelling fixes.
+ *#*
+ *#* Revision 1.13 2004/09/06 21:40:50 bernie
+ *#* Move buffer handling in chip-specific driver.
+ *#*
+ *#* Revision 1.12 2004/08/29 22:06:10 bernie
+ *#* Fix a bug in the (unused) RTS/CTS code; Clarify documentation.
+ *#*
+ *#* Revision 1.10 2004/08/10 06:30:41 bernie
+ *#* Major redesign of serial bus policy handling.
+ *#*
+ *#* Revision 1.9 2004/08/02 20:20:29 aleph
+ *#* Merge from project_ks
+ *#*
+ *#* Revision 1.8 2004/07/29 22:57:09 bernie
+ *#* Several tweaks to reduce code size on ATmega8.
+ *#*
+ *#* Revision 1.7 2004/07/18 21:54:23 bernie
+ *#* Add ATmega8 support.
+ *#*
+ *#* Revision 1.5 2004/06/27 15:25:40 aleph
+ *#* Add missing callbacks for SPI;
+ *#* Change UNUSED() macro to new version with two args;
+ *#* Use TX line filling only on the correct KBUS serial port;
+ *#* Fix nasty IRQ disabling bug in recv complete hander for port 1.
+ *#*
+ *#* Revision 1.4 2004/06/03 11:27:09 bernie
+ *#* Add dual-license information.
+ *#*
+ *#* Revision 1.3 2004/06/02 21:35:24 aleph
+ *#* Serial enhancements: interruptible receive handler and 8 bit serial status for AVR; remove volatile attribute to FIFOBuffer, useless for new fifobuf routens
+ *#*
+ *#* Revision 1.2 2004/05/23 18:21:53 bernie
+ *#* Trim CVS logs and cleanup header info.
+ *#*
+ *#*/
#include "ser.h"
#include "ser_p.h"
-#include "kdebug.h"
#include "config.h"
-#include "hw.h"
+#include "hw.h" /* Required for bus macros overrides */
+
+#include <debug.h>
#include <drv/timer.h>
#include <mware/fifobuf.h>
#include <avr/signal.h>
+#include <avr/io.h>
/*!
/*!
- * \def CONFIG_SER_STROBE
- *
- * This is a debug facility that can be used to
- * monitor SER interrupt activity on an external pin.
- *
- * To use strobes, redefine the macros SER_STROBE_ON,
- * SER_STROBE_OFF and SER_STROBE_INIT and set
- * CONFIG_SER_STROBE to 1.
- */
-#ifndef CONFIG_SER_STROBE
- #define SER_STROBE_ON do {/*nop*/} while(0)
- #define SER_STROBE_OFF do {/*nop*/} while(0)
- #define SER_STROBE_INIT do {/*nop*/} while(0)
-#endif
-
-
-/*!
- * \name Overridable serial hooks
+ * \name Overridable serial bus hooks
*
* These can be redefined in hw.h to implement
* special bus policies such as half-duplex, 485, etc.
/* SPI port and pin configuration */
#define SPI_PORT PORTB
#define SPI_DDR DDRB
-#define SPI_SCK_BIT PORTB1
-#define SPI_MOSI_BIT PORTB2
-#define SPI_MISO_BIT PORTB3
+#define SPI_SCK_BIT PB1
+#define SPI_MOSI_BIT PB2
+#define SPI_MISO_BIT PB3
-/* USART registers definitions */
-#if defined(__AVR_ATmega64__) || defined(__AVR_ATmega128__)
+/* USART register definitions */
+#if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128
#define AVR_HAS_UART1 1
-#elif defined(__AVR_ATmega8__)
+#elif CPU_AVR_ATMEGA8
#define AVR_HAS_UART1 0
#define UCSR0A UCSRA
#define UCSR0B UCSRB
#define UBRR0H UBRRH
#define SIG_UART0_DATA SIG_UART_DATA
#define SIG_UART0_RECV SIG_UART_RECV
-#elif defined(__AVR_ATmega103__)
+#elif CPU_AVR_ATMEGA103
#define AVR_HAS_UART1 0
#define UCSR0B UCR
#define UDR0 UDR
#endif
+/*!
+ * \def CONFIG_SER_STROBE
+ *
+ * This is a debug facility that can be used to
+ * monitor SER interrupt activity on an external pin.
+ *
+ * To use strobes, redefine the macros SER_STROBE_ON,
+ * SER_STROBE_OFF and SER_STROBE_INIT and set
+ * CONFIG_SER_STROBE to 1.
+ */
+#if !defined(CONFIG_SER_STROBE) || !CONFIG_SER_STROBE
+ #define SER_STROBE_ON do {/*nop*/} while(0)
+ #define SER_STROBE_OFF do {/*nop*/} while(0)
+ #define SER_STROBE_INIT do {/*nop*/} while(0)
+#endif
+
+
/* From the high-level serial driver */
extern struct Serial ser_handles[SER_CNT];
+/* TX and RX buffers */
+static unsigned char uart0_txbuffer[CONFIG_UART0_TXBUFSIZE];
+static unsigned char uart0_rxbuffer[CONFIG_UART0_RXBUFSIZE];
+#if AVR_HAS_UART1
+ static unsigned char uart1_txbuffer[CONFIG_UART1_TXBUFSIZE];
+ static unsigned char uart1_rxbuffer[CONFIG_UART1_RXBUFSIZE];
+#endif
+static unsigned char spi_txbuffer[CONFIG_SPI_TXBUFSIZE];
+static unsigned char spi_rxbuffer[CONFIG_SPI_RXBUFSIZE];
+
+
/*!
* Internal hardware state structure
*
- * \a sending var is true if we are transmitting.
- * SPI note: this flag is necessary because the SPI sends and receives bytes
- * at the same time and the SPI IRQ is unique for send/receive.
- * The only way to start transmission is to write data in SPDR (this
- * is done by spi_starttx()). We do this *only* if a transfer is
- * not already started.
+ * The \a sending variable is true while the transmission
+ * interrupt is retriggering itself.
*
* For the USARTs the \a sending flag is useful for taking specific
* actions before sending a burst of data, at the start of a trasmission
* but not before every char sent.
+ *
+ * For the SPI, this flag is necessary because the SPI sends and receives
+ * bytes at the same time and the SPI IRQ is unique for send/receive.
+ * The only way to start transmission is to write data in SPDR (this
+ * is done by spi_starttx()). We do this *only* if a transfer is
+ * not already started.
*/
struct AvrSerial
{
volatile bool sending;
};
+
/*
- * These are to trick GCC into *not* using
- * absolute addressing mode when accessing
- * ser_handles, which is very expensive.
+ * These are to trick GCC into *not* using absolute addressing mode
+ * when accessing ser_handles, which is very expensive.
*
- * Accessing through these pointers generates
- * much shorter (and hopefully faster) code.
+ * Accessing through these pointers generates much shorter
+ * (and hopefully faster) code.
*/
struct Serial *ser_uart0 = &ser_handles[SER_UART0];
#if AVR_HAS_UART1
struct AvrSerial *hw = (struct AvrSerial *)_hw;
/*
- * WARNING: racy code here! The tx interrupt
- * sets hw->sending to false when it runs with
- * an empty fifo. The order of the statements
- * in the if-block matters.
+ * WARNING: racy code here! The tx interrupt sets hw->sending to false
+ * when it runs with an empty fifo. The order of statements in the
+ * if-block matters.
*/
if (!hw->sending)
{
#endif
UBRR0L = (period);
- DB(kprintf("uart0_setbaudrate(rate=%lu): period=%d\n", rate, period);)
+ //DB(kprintf("uart0_setbaudrate(rate=%lu): period=%d\n", rate, period);)
}
static void uart0_setparity(UNUSED(struct SerialHardware *, _hw), int parity)
{
-#ifndef __AVR_ATmega103__
- UCSR0C |= (parity) << UPM0;
+#if !CPU_AVR_ATMEGA103
+ UCSR0C = (UCSR0C & ~(BV(UPM1) | BV(UPM0))) | ((parity) << UPM0);
#endif
}
UBRR1H = (period) >> 8;
UBRR1L = (period);
- DB(kprintf("uart1_setbaudrate(rate=%ld): period=%d\n", rate, period);)
+ //DB(kprintf("uart1_setbaudrate(rate=%ld): period=%d\n", rate, period);)
}
static void uart1_setparity(UNUSED(struct SerialHardware *, _hw), int parity)
{
- UCSR1C |= (parity) << UPM0;
+ UCSR1C = (UCSR1C & ~(BV(UPM1) | BV(UPM0))) | ((parity) << UPM0);
}
#endif // AVR_HAS_UART1
}
+// FIXME: move into compiler.h? Ditch?
+#if COMPILER_C99
+ #define C99INIT(name,val) .name = val
+#elif defined(__GNUC__)
+ #define C99INIT(name,val) name: val
+#else
+ #warning No designated initializers, double check your code
+ #define C99INIT(name,val) (val)
+#endif
/*
* High-level interface data structures
*/
static const struct SerialHardwareVT UART0_VT =
{
- .init = uart0_init,
- .cleanup = uart0_cleanup,
- .setbaudrate = uart0_setbaudrate,
- .setparity = uart0_setparity,
- .enabletxirq = uart0_enabletxirq,
+ C99INIT(init, uart0_init),
+ C99INIT(cleanup, uart0_cleanup),
+ C99INIT(setbaudrate, uart0_setbaudrate),
+ C99INIT(setparity, uart0_setparity),
+ C99INIT(enabletxirq, uart0_enabletxirq),
};
#if AVR_HAS_UART1
static const struct SerialHardwareVT UART1_VT =
{
- .init = uart1_init,
- .cleanup = uart1_cleanup,
- .setbaudrate = uart1_setbaudrate,
- .setparity = uart1_setparity,
- .enabletxirq = uart1_enabletxirq,
+ C99INIT(init, uart1_init),
+ C99INIT(cleanup, uart1_cleanup),
+ C99INIT(setbaudrate, uart1_setbaudrate),
+ C99INIT(setparity, uart1_setparity),
+ C99INIT(enabletxirq, uart1_enabletxirq),
};
#endif // AVR_HAS_UART1
static const struct SerialHardwareVT SPI_VT =
{
- .init = spi_init,
- .cleanup = spi_cleanup,
- .setbaudrate = spi_setbaudrate,
- .setparity = spi_setparity,
- .enabletxirq = spi_starttx,
+ C99INIT(init, spi_init),
+ C99INIT(cleanup, spi_cleanup),
+ C99INIT(setbaudrate, spi_setbaudrate),
+ C99INIT(setparity, spi_setparity),
+ C99INIT(enabletxirq, spi_starttx),
};
static struct AvrSerial UARTDescs[SER_CNT] =
{
{
- .hw = { .table = &UART0_VT },
- .sending = false,
+ C99INIT(hw, /**/) {
+ C99INIT(table, &UART0_VT),
+ C99INIT(txbuffer, uart0_txbuffer),
+ C99INIT(rxbuffer, uart0_rxbuffer),
+ C99INIT(txbuffer_size, sizeof(uart0_txbuffer)),
+ C99INIT(rxbuffer_size, sizeof(uart0_rxbuffer)),
+ },
+ C99INIT(sending, false),
},
#if AVR_HAS_UART1
{
- .hw = { .table = &UART1_VT },
- .sending = false,
+ C99INIT(hw, /**/) {
+ C99INIT(table, &UART1_VT),
+ C99INIT(txbuffer, uart1_txbuffer),
+ C99INIT(rxbuffer, uart1_rxbuffer),
+ C99INIT(txbuffer_size, sizeof(uart1_txbuffer)),
+ C99INIT(rxbuffer_size, sizeof(uart1_rxbuffer)),
+ },
+ C99INIT(sending, false),
},
#endif
{
- .hw = { .table = &SPI_VT },
- .sending = false,
+ C99INIT(hw, /**/) {
+ C99INIT(table, &SPI_VT),
+ C99INIT(txbuffer, spi_txbuffer),
+ C99INIT(rxbuffer, spi_rxbuffer),
+ C99INIT(txbuffer_size, sizeof(spi_txbuffer)),
+ C99INIT(rxbuffer_size, sizeof(spi_rxbuffer)),
+ },
+ C99INIT(sending, false),
}
};
}
-
/*
* Interrupt handlers
*/
{
// Disable rx interrupt and tx, enable CTS interrupt
// UNTESTED
- UCSR0B = BV(RXCIE) | BV(RXEN);
+ UCSR0B = BV(RXCIE) | BV(RXEN) | BV(TXEN);
sbi(EIFR, EIMSKB_CTS);
sbi(EIMSK, EIMSKB_CTS);
}
{
// Disable rx interrupt and tx, enable CTS interrupt
// UNTESTED
- UCSR1B = BV(RXCIE) | BV(RXEN);
+ UCSR1B = BV(RXCIE) | BV(RXEN) | BV(TXEN);
sbi(EIFR, EIMSKB_CTS);
sbi(EIMSK, EIMSKB_CTS);
}
* disabled. Using INTERRUPT() is troublesome when the serial
* is heavily loaded, because an interrupt could be retriggered
* when executing the handler prologue before RXCIE is disabled.
+ *
+ * \note The code that re-enables interrupts is commented out
+ * because in some nasty cases the interrupt is retriggered.
+ * This is probably due to the RXC flag being set before
+ * RXCIE is cleared. Unfortunately the RXC flag is read-only
+ * and can't be cleared by code.
*/
SIGNAL(SIG_UART0_RECV)
{
SER_STROBE_ON;
/* Disable Recv complete IRQ */
- UCSR0B &= ~BV(RXCIE);
- ENABLE_INTS;
+ //UCSR0B &= ~BV(RXCIE);
+ //ENABLE_INTS;
/* Should be read before UDR */
ser_uart0->status |= UCSR0A & (SERRF_RXSROVERRUN | SERRF_FRAMEERROR);
}
/* Reenable receive complete int */
- UCSR0B |= BV(RXCIE);
+ //DISABLE_INTS;
+ //UCSR0B |= BV(RXCIE);
SER_STROBE_OFF;
}
* disabled. Using INTERRUPT() is troublesome when the serial
* is heavily loaded, because an interrupt could be retriggered
* when executing the handler prologue before RXCIE is disabled.
+ *
+ * \see SIGNAL(SIG_UART0_RECV)
*/
SIGNAL(SIG_UART1_RECV)
{
SER_STROBE_ON;
/* Disable Recv complete IRQ */
- UCSR1B &= ~BV(RXCIE);
- ENABLE_INTS;
+ //UCSR1B &= ~BV(RXCIE);
+ //ENABLE_INTS;
/* Should be read before UDR */
ser_uart1->status |= UCSR1A & (SERRF_RXSROVERRUN | SERRF_FRAMEERROR);
*/
char c = UDR1;
struct FIFOBuffer * const rxfifo = &ser_uart1->rxfifo;
+ //ASSERT_VALID_FIFO(rxfifo);
- if (fifo_isfull(rxfifo))
+ if (UNLIKELY(fifo_isfull(rxfifo)))
ser_uart1->status |= SERRF_RXFIFOOVERRUN;
else
{
RTS_OFF;
#endif
}
- /* Reenable receive complete int */
- UCSR1B |= BV(RXCIE);
+ /* Re-enable receive complete int */
+ //UCSR1B |= BV(RXCIE);
SER_STROBE_OFF;
}
projects / bertos.git / blobdiff