-/*!
+/**
* \file
* <!--
* Copyright 2003, 2004 Develer S.r.l. (http://www.develer.com/)
* Copyright 2000 Bernardo Innocenti <bernie@codewiz.org>
- * This file is part of DevLib - See devlib/README for information.
+ * This file is part of DevLib - See README.devlib for information.
* -->
*
* \brief AVR UART and SPI I/O driver
/*#*
*#* $Log$
+ *#* Revision 1.32 2006/07/19 12:56:26 bernie
+ *#* Convert to new Doxygen style.
+ *#*
+ *#* Revision 1.31 2006/05/18 00:37:29 bernie
+ *#* Use hw_ser.h instead of ubiquitous hw.h.
+ *#*
+ *#* Revision 1.30 2006/02/17 22:23:06 bernie
+ *#* Update POSIX serial emulator.
+ *#*
+ *#* Revision 1.29 2005/11/27 23:31:48 bernie
+ *#* Support avr-libc 1.4.
+ *#*
+ *#* Revision 1.28 2005/11/04 16:20:02 bernie
+ *#* Fix reference to README.devlib in header.
+ *#*
+ *#* Revision 1.27 2005/07/03 15:19:31 bernie
+ *#* Doxygen fix.
+ *#*
+ *#* Revision 1.26 2005/04/11 19:10:27 bernie
+ *#* Include top-level headers from cfg/ subdir.
+ *#*
*#* Revision 1.25 2005/01/25 08:37:26 bernie
*#* CONFIG_SER_HWHANDSHAKE fixes.
*#*
#include "ser.h"
#include "ser_p.h"
-#include "config.h"
-#include "hw.h" /* Required for bus macros overrides */
+#include "hw_ser.h" /* Required for bus macros overrides */
+#include <appconfig.h>
-#include <debug.h>
+#include <cfg/debug.h>
#include <drv/timer.h>
#include <mware/fifobuf.h>
-#include <avr/signal.h>
#include <avr/io.h>
+#if defined(__AVR_LIBC_VERSION__) && (__AVR_LIBC_VERSION__ >= 10400UL)
+ #include <avr/interrupt.h>
+#else
+ #include <avr/signal.h>
+#endif
#if !CONFIG_SER_HWHANDSHAKE
- /*!
+ /**
* \name Hardware handshake (RTS/CTS).
* \{
*/
#define RTS_ON do {} while (0)
#define RTS_OFF do {} while (0)
#define IS_CTS_ON true
- #define EIMSKF_CTS 0 /*!< Dummy value, must be overridden */
+ #define EIMSKF_CTS 0 /**< Dummy value, must be overridden */
/*\}*/
#endif
-/*!
+/**
* \name Overridable serial bus hooks
*
* These can be redefined in hw.h to implement
* \{
*/
#ifndef SER_UART0_BUS_TXINIT
- /*!
+ /**
* Default TXINIT macro - invoked in uart0_init()
*
* - Enable both the receiver and the transmitter
#endif
#ifndef SER_UART0_BUS_TXBEGIN
- /*!
+ /**
* Invoked before starting a transmission
*
* - Enable both the receiver and the transmitter
#endif
#ifndef SER_UART0_BUS_TXCHAR
- /*!
+ /**
* Invoked to send one character.
*/
#define SER_UART0_BUS_TXCHAR(c) do { \
#endif
#ifndef SER_UART0_BUS_TXEND
- /*!
+ /**
* Invoked as soon as the txfifo becomes empty
*
* - Keep both the receiver and the transmitter enabled
#endif
#ifndef SER_UART0_BUS_TXOFF
- /*!
+ /**
* \def SER_UART0_BUS_TXOFF
*
* Invoked after the last character has been transmitted
#endif
#ifndef SER_UART1_BUS_TXINIT
- /*! \sa SER_UART0_BUS_TXINIT */
+ /** \sa SER_UART0_BUS_TXINIT */
#define SER_UART1_BUS_TXINIT do { \
UCSR1B = BV(RXCIE) | BV(RXEN) | BV(TXEN); \
} while (0)
#endif
#ifndef SER_UART1_BUS_TXBEGIN
- /*! \sa SER_UART0_BUS_TXBEGIN */
+ /** \sa SER_UART0_BUS_TXBEGIN */
#define SER_UART1_BUS_TXBEGIN do { \
UCSR1B = BV(RXCIE) | BV(UDRIE) | BV(RXEN) | BV(TXEN); \
} while (0)
#endif
#ifndef SER_UART1_BUS_TXCHAR
- /*! \sa SER_UART0_BUS_TXCHAR */
+ /** \sa SER_UART0_BUS_TXCHAR */
#define SER_UART1_BUS_TXCHAR(c) do { \
UDR1 = (c); \
} while (0)
#endif
#ifndef SER_UART1_BUS_TXEND
- /*! \sa SER_UART0_BUS_TXEND */
+ /** \sa SER_UART0_BUS_TXEND */
#define SER_UART1_BUS_TXEND do { \
UCSR1B = BV(RXCIE) | BV(RXEN) | BV(TXEN); \
} while (0)
#endif
#ifndef SER_UART1_BUS_TXOFF
- /*!
+ /**
* \def SER_UART1_BUS_TXOFF
*
* \see SER_UART0_BUS_TXOFF
/*\}*/
-/*!
+/**
* \name Overridable SPI hooks
*
* These can be redefined in hw.h to implement
* \{
*/
#ifndef SER_SPI_BUS_TXINIT
- /*!
- * \def SER_SPI_BUS_TXINIT
- *
+ /**
* Default TXINIT macro - invoked in spi_init()
* The default is no action.
*/
#endif
#ifndef SER_SPI_BUS_TXCLOSE
- /*!
- * \def SER_SPI_BUS_TXCLOSE
- *
+ /**
* Invoked after the last character has been transmitted.
* The default is no action.
*/
#endif
-/*!
+/**
* \def CONFIG_SER_STROBE
*
* This is a debug facility that can be used to
static unsigned char spi_rxbuffer[CONFIG_SPI_RXBUFSIZE];
-/*!
+/**
* Internal hardware state structure
*
* The \a sending variable is true while the transmission
}
};
-struct SerialHardware* ser_hw_getdesc(int unit)
+struct SerialHardware *ser_hw_getdesc(int unit)
{
ASSERT(unit < SER_CNT);
return &UARTDescs[unit].hw;
#if CONFIG_SER_HWHANDSHAKE
-//! This interrupt is triggered when the CTS line goes high
+/// This interrupt is triggered when the CTS line goes high
SIGNAL(SIG_CTS)
{
// Re-enable UDR empty interrupt and TX, then disable CTS interrupt
#endif // CONFIG_SER_HWHANDSHAKE
-/*!
+/**
* Serial 0 TX interrupt handler
*/
SIGNAL(SIG_UART0_DATA)
}
#ifdef SER_UART0_BUS_TXOFF
-/*!
+/**
* Serial port 0 TX complete interrupt handler.
*
* This IRQ is usually disabled. The UDR-empty interrupt
#if AVR_HAS_UART1
-/*!
+/**
* Serial 1 TX interrupt handler
*/
SIGNAL(SIG_UART1_DATA)
}
#ifdef SER_UART1_BUS_TXOFF
-/*!
+/**
* Serial port 1 TX complete interrupt handler.
*
* \sa port 0 TX complete handler.
#endif // AVR_HAS_UART1
-/*!
+/**
* Serial 0 RX complete interrupt handler.
*
* This handler is interruptible.
#if AVR_HAS_UART1
-/*!
+/**
* Serial 1 RX complete interrupt handler.
*
* This handler is interruptible.
#endif // AVR_HAS_UART1
-/*!
+/**
* SPI interrupt handler
*/
SIGNAL(SIG_SPI)