-/*!
+/**
* \file
* <!--
- * Copyright 2003,2004 Develer S.r.l. (http://www.develer.com/)
+ * Copyright 2003, 2004, 2005 Develer S.r.l. (http://www.develer.com/)
* Copyright 2000 Bernardo Innocenti <bernie@develer.com>
- * This file is part of DevLib - See devlib/README for information.
+ * This file is part of DevLib - See README.devlib for information.
* -->
*
* \version $Id$
*
* \author Bernardo Innocenti <bernie@develer.com>
+ * \author Francesco Sacchi <batt@develer.com>
*
- * \brief Low-level timer module for AVR
- */
-
-/*
- * $Log$
- * Revision 1.10 2004/08/02 20:20:29 aleph
- * Merge from project_ks
- *
- * Revision 1.9 2004/07/22 02:01:14 bernie
- * Use TIMER_PRESCALER consistently.
- *
- * Revision 1.8 2004/07/20 23:50:20 bernie
- * Also define TIMER_PRESCALER.
- *
- * Revision 1.7 2004/07/20 23:49:40 bernie
- * Compute value of OCR_DIVISOR from CLOCK_FREQ.
- *
- * Revision 1.6 2004/07/20 23:48:16 bernie
- * Finally remove redundant protos.
- *
- * Revision 1.5 2004/07/18 22:16:35 bernie
- * Add missing header; Prevent warning for project_ks-specific code.
- *
- * Revision 1.4 2004/06/27 15:22:15 aleph
- * Fix spacing
- *
- * Revision 1.3 2004/06/07 15:57:40 aleph
- * Update to latest AVR timer code
- *
- * Revision 1.2 2004/06/03 11:27:09 bernie
- * Add dual-license information.
- *
- * Revision 1.1 2004/05/23 18:23:30 bernie
- * Import drv/timer module.
- *
+ * \brief Low-level timer module for AVR (interface).
*/
+/*#*
+ *#* $Log$
+ *#* Revision 1.32 2007/10/08 12:14:32 batt
+ *#* Fix some review issues.
+ *#*
+ *#* Revision 1.31 2007/10/07 12:30:55 batt
+ *#* Add default timer for AVR.
+ *#*
+ *#* Revision 1.30 2007/06/07 14:35:12 batt
+ *#* Merge from project_ks.
+ *#*
+ *#* Revision 1.29 2007/03/21 11:01:36 batt
+ *#* Add missing support for ATMega1281.
+ *#*
+ *#* Revision 1.28 2006/07/19 12:56:26 bernie
+ *#* Convert to new Doxygen style.
+ *#*
+ *#* Revision 1.27 2006/05/18 00:38:24 bernie
+ *#* Use hw_cpu.h instead of ubiquitous hw.h.
+ *#*
+ *#* Revision 1.26 2006/02/21 21:28:02 bernie
+ *#* New time handling based on TIMER_TICKS_PER_SEC to support slow timers with ticks longer than 1ms.
+ *#*
+ *#* Revision 1.25 2005/07/19 07:26:37 bernie
+ *#* Refactor to decouple timer ticks from milliseconds.
+ *#*
+ *#* Revision 1.24 2005/04/11 19:10:28 bernie
+ *#* Include top-level headers from cfg/ subdir.
+ *#*
+ *#* Revision 1.23 2005/03/01 23:24:51 bernie
+ *#* Tweaks for avr-libc 1.2.x.
+ *#*
+ *#* Revision 1.21 2004/12/13 12:07:06 bernie
+ *#* DISABLE_IRQSAVE/ENABLE_IRQRESTORE: Convert to IRQ_SAVE_DISABLE/IRQ_RESTORE.
+ *#*
+ *#* Revision 1.20 2004/11/16 20:59:46 bernie
+ *#* Include <avr/io.h> explicitly.
+ *#*
+ *#* Revision 1.19 2004/10/19 08:56:41 bernie
+ *#* TIMER_STROBE_ON, TIMER_STROBE_OFF, TIMER_STROBE_INIT: Move from timer_avr.h to timer.h, where they really belong.
+ *#*
+ *#* Revision 1.18 2004/09/20 03:31:03 bernie
+ *#* Fix racy racy code.
+ *#*/
#ifndef DRV_TIMER_AVR_H
#define DRV_TIMER_AVR_H
-#include <avr/wdt.h>
-#include <avr/signal.h>
-
-#if defined(ARCH_BOARD_KC) && (ARCH & ARCH_BOARD_KC)
- #include <drv/adc.h>
-#endif
+#include <appconfig.h> /* CONFIG_TIMER */
+#include <cfg/compiler.h> /* uint8_t */
+#include <hw_cpu.h> /* CLOCK_FREQ */
+/**
+ * \name Values for CONFIG_TIMER.
+ *
+ * Select which hardware timer interrupt to use for system clock and softtimers.
+ * \note The timer 1 overflow mode set the timer as a 24 kHz PWM.
+ *
+ * \{
+ */
+#define TIMER_ON_OUTPUT_COMPARE0 1
+#define TIMER_ON_OVERFLOW1 2
+#define TIMER_ON_OUTPUT_COMPARE2 3
+#define TIMER_ON_OVERFLOW3 4
-/* Not needed, IRQ timer flag cleared automatically */
-#define timer_hw_irq() do {} while (0)
-
-#define TIMER_PRESCALER 64
+#define TIMER_DEFAULT TIMER_ON_OUTPUT_COMPARE0 ///< Default system timer
+/* \} */
-/*!
- * System timer: additional division after the prescaler
- * 12288000 / 64 / 192 (0..191) = 1 ms
+/*
+ * Hardware dependent timer initialization.
*/
-#define OCR_DIVISOR (CLOCK_FREQ / TIMER_PRESCALER / TICKS_PER_SEC - 1) /* 191 */
+#if (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE0)
-/*! HW dependent timer initialization */
-#if defined(CONFIG_TIMER_ON_TIMER0)
+ #define TIMER_PRESCALER 64
+ #define TIMER_HW_BITS 8
+ #define DEFINE_TIMER_ISR SIGNAL(SIG_OUTPUT_COMPARE0)
+ #define TIMER_TICKS_PER_SEC 1000
+ #define TIMER_HW_CNT OCR_DIVISOR
- //! Type of time expressed in ticks of the hardware high-precision timer
+ /// Type of time expressed in ticks of the hardware high-precision timer
typedef uint8_t hptime_t;
- static void timer_hw_init(void)
- {
- cpuflags_t flags;
- DISABLE_IRQSAVE(flags);
-
- /* Reset Timer flags */
- TIFR = BV(OCF0) | BV(TOV0);
-
- /* Setup Timer/Counter interrupt */
- ASSR = 0x00; /* Internal system clock */
- TCCR0 = BV(WGM01) /* Clear on Compare match */
- #if TIMER_PRESCALER == 64
- | BV(CS02)
- #else
- #error Unsupported value of TIMER_PRESCALER
- #endif
- ;
- TCNT0 = 0x00; /* Initialization of Timer/Counter */
- OCR0 = OCR_DIVISOR; /* Timer/Counter Output Compare Register */
-
- /* Enable timer interrupts: Timer/Counter2 Output Compare (OCIE2) */
- TIMSK &= ~BV(TOIE0);
- TIMSK |= BV(OCIE0);
-
- ENABLE_IRQRESTORE(flags);
- }
-
- //! Frequency of the hardware high precision timer
- #define TIMER_HW_HPTICKS_PER_SEC (CLOCK_FREQ / TIMER_PRESCALER)
+#elif (CONFIG_TIMER == TIMER_ON_OVERFLOW1)
- INLINE hptime_t timer_hw_hpread(void)
- {
- return TCNT0;
- }
+ #define TIMER_PRESCALER 1
+ #define TIMER_HW_BITS 8
+ /** This value is the maximum in overflow based timers. */
+ #define TIMER_HW_CNT (1 << TIMER_HW_BITS)
+ #define DEFINE_TIMER_ISR SIGNAL(SIG_OVERFLOW1)
+ #define TIMER_TICKS_PER_SEC ((TIMER_HW_HPTICKS_PER_SEC + TIMER_HW_CNT / 2) / TIMER_HW_CNT)
-#elif defined(CONFIG_TIMER_ON_TIMER1_OVERFLOW)
-
- //! Type of time expressed in ticks of the hardware high precision timer
+ /// Type of time expressed in ticks of the hardware high precision timer
typedef uint16_t hptime_t;
- static void timer_hw_init(void)
- {
- cpuflags_t flags;
- DISABLE_IRQSAVE(flags);
-
- /* Reset Timer overflow flag */
- TIFR |= BV(TOV1);
-
- /* Fast PWM mode, 9 bit, 24 kHz, no prescaling. When changing freq or
- resolution (top of TCNT), change TIMER_HW_HPTICKS_PER_SEC too */
- TCCR1A |= BV(WGM11);
- TCCR1A &= ~BV(WGM10);
- TCCR1B |= BV(WGM12) | BV(CS10);
- TCCR1B &= ~(BV(WGM13) | BV(CS11) | BV(CS12));
-
- TCNT1 = 0x00; /* initialization of Timer/Counter */
-
- /* Enable timer interrupt: Timer/Counter1 Overflow */
- TIMSK |= BV(TOIE1);
-
- ENABLE_IRQRESTORE(flags);
- }
-
- //! Frequency of the hardware high precision timer
- #define TIMER_HW_HPTICKS_PER_SEC (24000ul * 512)
+#elif (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE2)
- INLINE hptime_t timer_hw_hpread(void)
- {
- return TCNT1;
- }
+ #define TIMER_PRESCALER 64
+ #define TIMER_HW_BITS 8
+ #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA168
+ #define DEFINE_TIMER_ISR SIGNAL(SIG_OUTPUT_COMPARE2A)
+ #else
+ #define DEFINE_TIMER_ISR SIGNAL(SIG_OUTPUT_COMPARE2)
+ #endif
+ #define TIMER_TICKS_PER_SEC 1000
+ /** Value for OCR register in output-compare based timers. */
+ #define TIMER_HW_CNT OCR_DIVISOR
-#elif defined(CONFIG_TIMER_ON_TIMER2)
- //! Type of time expressed in ticks of the hardware high precision timer
+ /// Type of time expressed in ticks of the hardware high precision timer
typedef uint8_t hptime_t;
- static void timer_hw_init(void)
- {
- cpuflags_t flags;
- DISABLE_IRQSAVE(flags);
-
- /* Reset Timer flags */
- TIFR = BV(OCF2) | BV(TOV2);
-
- /* Setup Timer/Counter interrupt */
- TCCR2 = BV(WGM21)
- #if TIMER_PRESCALER == 64
- | BV(CS21) | BV(CS20)
- #else
- #error Unsupported value of TIMER_PRESCALER
- #endif
- ;
- /* Clear on Compare match & prescaler = 64, internal sys clock.
- When changing prescaler change TIMER_HW_HPTICKS_PER_SEC too */
- TCNT2 = 0x00; /* initialization of Timer/Counter */
- OCR2 = OCR_DIVISOR; /* Timer/Counter Output Compare Register */
-
- /* Enable timer interrupts: Timer/Counter2 Output Compare (OCIE2) */
- TIMSK &= ~BV(TOIE2);
- TIMSK |= BV(OCIE2);
+#elif (CONFIG_TIMER == TIMER_ON_OVERFLOW3)
- ENABLE_IRQRESTORE(flags);
- }
-
- //! Frequency of the hardware high precision timer
- #define TIMER_HW_HPTICKS_PER_SEC (CLOCK_FREQ / TIMER_PRESCALER)
-
- INLINE hptime_t timer_hw_hpread(void)
- {
- return TCNT2;
- }
+ #define TIMER_PRESCALER 1
+ #define TIMER_HW_BITS 8
+ /** This value is the maximum in overflow based timers. */
+ #define TIMER_HW_CNT (1 << TIMER_HW_BITS)
+ #define DEFINE_TIMER_ISR SIGNAL(SIG_OVERFLOW3)
+ #define TIMER_TICKS_PER_SEC ((TIMER_HW_HPTICKS_PER_SEC + TIMER_HW_CNT / 2) / TIMER_HW_CNT)
+ /// Type of time expressed in ticks of the hardware high precision timer
+ typedef uint16_t hptime_t;
#else
- #error Choose witch timer to use with CONFIG_TIMER_ON_TIMERx
-#endif /* CONFIG_TIMER_ON_TIMERx */
+ #error Unimplemented value for CONFIG_TIMER
+#endif /* CONFIG_TIMER */
-#if defined(CONFIG_TIMER_ON_TIMER1_OVERFLOW)
- #define DEFINE_TIMER_ISR \
- static void timer_handler(void)
+/** Frequency of the hardware high precision timer. */
+#define TIMER_HW_HPTICKS_PER_SEC ((CLOCK_FREQ + TIMER_PRESCALER / 2) / TIMER_PRESCALER)
- DEFINE_TIMER_ISR;
-
- /*
- * Timer 1 overflow irq handler. It's called at the frequency of the timer 1
- * PWM (should be 24 kHz). It's too much for timer purposes, so the interrupt
- * handler is really a counter that call the true handler in timer.c
- * every 1 ms.
- */
- SIGNAL(SIG_OVERFLOW1)
- {
- /*!
- * How many overflow we have to count before calling the true timer handler.
- * If timer overflow is at 24 kHz, with a value of 24 we have 1 ms between
- * each call.
- */
- #define TIMER1_OVF_COUNT 24
-
- static uint8_t count = TIMER1_OVF_COUNT;
-
- count--;
- if (!count)
- {
- timer_handler();
- count = TIMER1_OVF_COUNT;
- }
-
- #if (ARCH & ARCH_BOARD_KC)
- /*
- * Super-optimization-hack: switch CPU ADC mux here, ASAP after the start
- * of conversion (auto-triggered with timer 1 overflow).
- * The switch can be done 2 ADC cycles after start of conversion.
- * The handler prologue takes a little more than 32 CPU cycles: with
- * the prescaler at 1/16 the timing should be correct even at the start
- * of the handler.
- *
- * The switch is synchronized with the ADC handler using _adc_trigger_lock.
- */
- extern uint8_t _adc_idx_next;
- extern bool _adc_trigger_lock;
-
- if (!_adc_trigger_lock)
- {
- TIMER_STROBE_ON;
- ADC_SETCHN(_adc_idx_next);
- TIMER_STROBE_OFF;
- _adc_trigger_lock = true;
- }
- #endif
- }
-
-#elif defined (CONFIG_TIMER_ON_TIMER0)
-
- #define DEFINE_TIMER_ISR \
- SIGNAL(SIG_OUTPUT_COMPARE0)
+/**
+ * System timer: additional division after the prescaler
+ * 12288000 / 64 / 192 (0..191) = 1 ms
+ */
+#define OCR_DIVISOR (((CLOCK_FREQ + TIMER_PRESCALER / 2) / TIMER_PRESCALER + TIMER_TICKS_PER_SEC / 2) / TIMER_TICKS_PER_SEC - 1)
-#elif defined(CONFIG_TIMER_ON_TIMER2)
+/** Not needed, IRQ timer flag cleared automatically */
+#define timer_hw_irq() do {} while (0)
- #define DEFINE_TIMER_ISR \
- SIGNAL(SIG_OUTPUT_COMPARE2)
+/** Not needed, timer IRQ handler called only for timer source */
+#define timer_hw_triggered() (true)
-#else
- #error Choose witch timer to use with CONFIG_TIMER_ON_TIMERx
-#endif /* CONFIG_TIMER_ON_TIMERx */
#endif /* DRV_TIMER_AVR_H */
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