git-svn-id: https://src.develer.com/svnoss/bertos/trunk@2539 38d2e660-2303-0410-9eaa...

[bertos.git] / examples / triface / hw / hw_sipo.h

diff --git a/examples/triface/hw/hw_sipo.h b/examples/triface/hw/hw_sipo.h
index d2cfde750633f489aa610ed06bfc7693b68affa6..f31497f27543a68448cf41f95e0d72f44689a5ae 100644 (file)
--- a/examples/triface/hw/hw_sipo.h
+++ b/examples/triface/hw/hw_sipo.h
@@ -26,7 +26,7 @@
  * invalidate any other reasons why the executable file might be covered by
  * the GNU General Public License.
  *
- * Copyright 2003, 2004, 2006 Develer S.r.l. (http://www.develer.com/)
+ * Copyright 2003, 2004, 2006, 2009 Develer S.r.l. (http://www.develer.com/)
  * Copyright 2000 Bernie Innocenti <bernie@codewiz.org>
  *
  * -->
@@ -36,6 +36,7 @@
  *
  * \version $Id$
  *
+ * \author Andrea Grandi <andrea@develer.com>
  * \author Daniele Basile <asterix@develer.com>
  */
 
@@ -47,9 +48,9 @@
 #include <avr/io.h>
 
 //Set output pin for sipo
-#define SCK_OUT            (DDRB |= BV(PB1))  // Load clock pin
-#define SOUT_OUT           (DDRB |= BV(PB2))  // Serial in pin
-#define SLOAD_OUT          (DDRB |= BV(PB3))  // Store clock pin
+#define SCK_OUT            (DDRB |= BV(PB1))  // Shift register clock input pin
+#define SOUT_OUT           (DDRB |= BV(PB2))  // Serial data input pin
+#define SLOAD_OUT          (DDRB |= BV(PB3))  // Storage register clock input pin
 #define OE_OUT             (DDRG |= BV(PG3))  // Output enable pin
 
 //Define output level
@@ -62,8 +63,8 @@
 #define OE_LOW             (PORTG &= BV(PG3))
 
 /**
- * Define the procedure to set one bit low/hight to
- * serial input in sipo device.
+ * Define the macros needed to set the serial input bit of SIPO device
+ * low or high.
  */
 #define SIPO_SI_HIGH()    SOUT_OUT_HIGH
 #define SIPO_SI_LOW()     SOUT_OUT_LOW
@@ -94,7 +95,7 @@
 
 
 /**
- * Do anything that needed to init sipo pins.
+ * Do everything needed in order to init the SIPO pins.
  */
 #define SIPO_INIT_PIN() \
        do { \