Adjust for DevLib.

[bertos.git] / mware / fifobuf.h

diff --git a/mware/fifobuf.h b/mware/fifobuf.h
index 8da90c20dfa155dbf2af4ea95b175ed41844ab3f..12de29495cf64fc9bbafc8eb0ba14cfeb366c664 100755 (executable)
--- a/mware/fifobuf.h
+++ b/mware/fifobuf.h
@@ -43,6 +43,15 @@
 
 /*
  * $Log$
+ * Revision 1.12  2004/08/02 20:20:29  aleph
+ * Merge from project_ks
+ *
+ * Revision 1.11  2004/07/30 14:15:53  rasky
+ * Nuovo supporto unificato per detect della CPU
+ *
+ * Revision 1.10  2004/07/29 22:57:09  bernie
+ * Doxygen fix.
+ *
  * Revision 1.9  2004/07/20 23:54:27  bernie
  * fifo_flush_locked(): New function;
  * Revamp documentation.
@@ -181,19 +190,20 @@ INLINE void fifo_flush(FIFOBuffer *fb)
 }
 
 
-#if !defined(__AVR__)
+#if !CPU_AVR
 
        /* No tricks needed on 16/32bit CPUs */
 #      define fifo_isempty_locked(fb) fifo_isempty((fb))
 #      define fifo_push_locked(fb, c) fifo_push((fb), (c))
-#      define fifo_flush_locked(fb, c) fifo_flush((fb), (c))
+#      define fifo_flush_locked(fb) fifo_flush((fb))
 
-#else /* !__AVR__ */
+#else /* !CPU_AVR */
 
        /*!
         * Similar to fifo_isempty(), but with stronger guarantees for
         * concurrent access between user and interrupt code.
-        * This is actually only needed for 8-bit processors.
+        *
+        * \note This is actually only needed for 8-bit processors.
         *
         * \sa fifo_isempty()
         */
@@ -241,7 +251,7 @@ INLINE void fifo_flush(FIFOBuffer *fb)
                ENABLE_IRQRESTORE(flags);
        }
 
-#endif /* !__AVR__ */
+#endif /* !CPU_AVR */
 
 
 /*!