X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;ds=sidebyside;f=bertos%2Fcpu%2Favr%2Fdrv%2Fadc_avr.c;h=20aa2a192de4144c4c1634516d9f7f2ebf8a9da1;hb=c4091308dd2d35b7a79b3b0632ade5594b6fedf4;hp=bf5a5600d7e41fb303d4b35aee64b0392e87565a;hpb=b3f61b96f21a6d4c491a65e607c5f41fdb028363;p=bertos.git

diff --git a/bertos/cpu/avr/drv/adc_avr.c b/bertos/cpu/avr/drv/adc_avr.c
index bf5a5600..20aa2a19 100644
--- a/bertos/cpu/avr/drv/adc_avr.c
+++ b/bertos/cpu/avr/drv/adc_avr.c
@@ -34,27 +34,38 @@
  * \version $Id$
  * \author Francesco Sacchi <batt@develer.com>
  *
- * This module is automatically included so no need to include 
+ * This module is automatically included so no need to include
  * in test list.
  * notest: avr
+ *
+ * $WIZ$
  */
 
 #include "adc_avr.h"
 
-#include <cpu/irq.h> // IRQ_ASSERT_ENABLED()
 #include "cfg/cfg_adc.h"
-#include "cfg/cfg_kern.h"
+#include "cfg/cfg_proc.h"
+#include "cfg/cfg_signal.h"
 #include <cfg/macros.h>
 #include <cfg/compiler.h>
 
+#include <cpu/irq.h> // IRQ_ASSERT_ENABLED()
+
 #include <drv/adc.h>
 
 #include <avr/io.h>
 #include <avr/interrupt.h>
 
+/**
+ * ADC voltage referencese.
+ *
+ * $WIZ$ avr_adc_refs = "ADC_AVR_AREF", "ADC_AVR_AVCC", "ADC_AVR_INT256"
+ * \{
+ */
 #define ADC_AVR_AREF   0
 #define ADC_AVR_AVCC   1
 #define ADC_AVR_INT256 2
+/* \} */
 
 #if CONFIG_KERN
 	#include <cfg/module.h>
@@ -63,7 +74,7 @@
 
 
 	#if !CONFIG_KERN_SIGNALS
-		#error Signals must be active to use ADC with kernel
+		#error Signals must be active to use the ADC with kernel
 	#endif
 
 	/* Signal adc convertion end */
@@ -86,10 +97,10 @@
  * Select mux channel \a ch.
  * \todo only first 8 channels are selectable!
  */
-INLINE void adc_hw_select_ch(uint8_t ch)
+void adc_hw_select_ch(uint8_t ch)
 {
 	/* Set to 0 all mux registers */
-	ADMUX &= ~(BV(MUX3) | BV(MUX3) | BV(MUX2) | BV(MUX1) | BV(MUX0));
+	ADMUX &= ~(BV(MUX4) | BV(MUX3) | BV(MUX2) | BV(MUX1) | BV(MUX0));
 
 	/* Select channel, only first 8 channel modes are supported for now */
 	ADMUX |= (ch & 0x07);
@@ -101,7 +112,7 @@ INLINE void adc_hw_select_ch(uint8_t ch)
  * If a kernel is present, preempt until convertion is complete, otherwise
  * a busy wait on ADCS bit is done.
  */
-INLINE uint16_t adc_hw_read(void)
+uint16_t adc_hw_read(void)
 {
 	// Ensure another convertion is not running.
 	ASSERT(!(ADCSRA & BV(ADSC)));
@@ -125,7 +136,7 @@ INLINE uint16_t adc_hw_read(void)
 /**
  * Init ADC hardware.
  */
-INLINE void adc_hw_init(void)
+void adc_hw_init(void)
 {
 	/*
 	 * Select channel 0 as default,
@@ -146,8 +157,10 @@ INLINE void adc_hw_init(void)
 		#error Unsupported ADC ref value.
 	#endif
 
+	#if defined(ADCSRB)
 	/* Disable Auto trigger source: ADC in Free running mode. */
 	ADCSRB = 0;
+	#endif
 
 	/* Enable ADC, disable autotrigger mode. */
 	ADCSRA = BV(ADEN);