X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;ds=sidebyside;f=bertos%2Fcpu%2Favr%2Fdrv%2Ftimer_avr.c;h=5decb0483b74afe578a5af86dff782dcf740b1a9;hb=0f60d6b24cf8ec1c9bd8dca82fed6325932c5aca;hp=1ef5caec801ee67ae7dec43a9ec0d4ecc7fcabee;hpb=164c71e645763cc0bdd059f108b83cb973420533;p=bertos.git

diff --git a/bertos/cpu/avr/drv/timer_avr.c b/bertos/cpu/avr/drv/timer_avr.c
index 1ef5caec..5decb048 100644
--- a/bertos/cpu/avr/drv/timer_avr.c
+++ b/bertos/cpu/avr/drv/timer_avr.c
@@ -30,8 +30,6 @@
  *
  * -->
  *
- * \version $Id$
- *
  * \author Bernie Innocenti <bernie@codewiz.org>
  * \author Francesco Sacchi <batt@develer.com>
  * \author Luca Ottaviano <lottaviano@develer.com>
@@ -51,18 +49,18 @@
 
 #include <avr/io.h>
 
-#if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P
+#if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P
 	#define REG_TIFR0 TIFR0
 	#define REG_TIFR1 TIFR1
 	#define REG_TIFR2 TIFR2
-	#if CPU_AVR_ATMEGA1281
+	#if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280
 		#define REG_TIFR3 TIFR3
 	#endif
 
 	#define REG_TIMSK0 TIMSK0
 	#define REG_TIMSK1 TIMSK1
 	#define REG_TIMSK2 TIMSK2
-	#if CPU_AVR_ATMEGA1281
+	#if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280
 		#define REG_TIMSK3 TIMSK3
 	#endif
 
@@ -84,6 +82,7 @@
 	#define REG_TIFR0 TIFR
 	#define REG_TIFR1 TIFR
 	#define REG_TIFR2 TIFR
+	#define REG_TIFR3 TIFR
 
 	#define REG_TIMSK0 TIMSK
 	#define REG_TIMSK1 TIMSK
@@ -138,7 +137,7 @@
 			#else
 				#error Unsupported value of TIMER_PRESCALER
 			#endif
-		;
+
 		TCNT0 = 0x00;                 /* Initialization of Timer/Counter */
 		REG_OCR0A = OCR_DIVISOR;           /* Timer/Counter Output Compare Register */
 
@@ -206,7 +205,7 @@
 		/* Clear on Compare match & prescaler = 64, internal sys clock.
 		   When changing prescaler change TIMER_HW_HPTICKS_PER_SEC too */
 		TCNT2 = 0x00;         /* initialization of Timer/Counter */
-		REG_OCR2A = OCR_DIVISOR;   /* Timer/Counter Output Compare Register */
+		REG_OCR2A = (uint8_t)OCR_DIVISOR;   /* Timer/Counter Output Compare Register */
 
 		/* Enable timer interrupts: Timer/Counter2 Output Compare (OCIE2) */
 		REG_TIMSK2 &= ~BV(TOIE2);
@@ -217,6 +216,10 @@
 
 #elif (CONFIG_TIMER == TIMER_ON_OVERFLOW3)
 
+	#if CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P || CPU_AVR_ATMEGA32
+		#error For select target there is not TIMER_ON_OVERFLOW3, please select an other one.
+	#endif
+
 	void timer_hw_init(void)
 	{
 		cpu_flags_t flags;
@@ -245,7 +248,7 @@
 		TCNT3 = 0x00;
 
 		/* Enable timer interrupt: Timer/Counter3 Overflow */
-		REG_TIMSK3 = |= BV(TOIE3);
+		REG_TIMSK3 |= BV(TOIE3);
 
 		IRQ_RESTORE(flags);
 	}