X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;ds=sidebyside;f=bertos%2Fcpu%2Fcortex-m3%2Fdrv%2Fser_lm3s.h;h=9485b1f8a7197215f564b6a97ca5517cac92a21b;hb=dbe46a961b80ff6d37dfd4238c2bd75a087daaf6;hp=27da414b4c6092303dfaadb8df4af54543ce879c;hpb=3234ec653302eb271f87197429f1f6cbd8f0bdb7;p=bertos.git diff --git a/bertos/cpu/cortex-m3/drv/ser_lm3s.h b/bertos/cpu/cortex-m3/drv/ser_lm3s.h index 27da414b..9485b1f8 100644 --- a/bertos/cpu/cortex-m3/drv/ser_lm3s.h +++ b/bertos/cpu/cortex-m3/drv/ser_lm3s.h @@ -40,6 +40,7 @@ #include #include /* cpu_relax() */ +#include /* lm3s_busyWait() */ #include /* Serial hardware numbers */ @@ -76,6 +77,7 @@ INLINE void lm3s_uartDisable(uint32_t base) /* Disable the UART */ HWREG(base + UART_O_CTL) &= ~(UART_CTL_UARTEN | UART_CTL_TXE | UART_CTL_RXE); + lm3s_busyWait(512); } INLINE void lm3s_uartEnable(uint32_t base) @@ -86,6 +88,7 @@ INLINE void lm3s_uartEnable(uint32_t base) /* Enable RX, TX, and the UART */ HWREG(base + UART_O_CTL) |= UART_CTL_UARTEN | UART_CTL_TXE | UART_CTL_RXE; + lm3s_busyWait(512); } INLINE bool lm3s_uartTxDone(uint32_t base)