X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;ds=sidebyside;f=bertos%2Fcpu%2Fcortex-m3%2Fio%2Fstm32_uart.h;h=c7e8abf05bf4e985cc128479fd75bd151e121fc8;hb=de286244b7adc34ed3547a21f52b12ca66310f5f;hp=13e31cde10527ad9347b449124e7afd9a1752cb0;hpb=86744069b05fd2c01b09f5dd0c36fc4c9cae5c8c;p=bertos.git

diff --git a/bertos/cpu/cortex-m3/io/stm32_uart.h b/bertos/cpu/cortex-m3/io/stm32_uart.h
index 13e31cde..c7e8abf0 100644
--- a/bertos/cpu/cortex-m3/io/stm32_uart.h
+++ b/bertos/cpu/cortex-m3/io/stm32_uart.h
@@ -172,6 +172,19 @@
 #define CR3_IREN_RESET            ((uint16_t)0xFFFD)  /* USART IrDA Disable MASK */
 #define CR3_CLEAR_MASK            ((uint16_t)0xFCFF)  /* USART CR3 MASK */
 
+
+/* Status */
+#define SR_CTS                                    9
+#define SR_LBD                                    8
+#define SR_TXE                                    7
+#define SR_TC                                     6
+#define SR_RXNE                                   5
+#define SR_IDLE                                   4
+#define SR_ORE                                    3
+#define SR_NE                                     2
+#define SR_FE                                     1
+#define SR_PE                                     0
+
 #define GTPR_LSB_MASK             ((uint16_t)0x00FF)  /* Guard Time Register LSB MASK */
 #define GTPR_MSB_MASK             ((uint16_t)0xFF00)  /* Guard Time Register MSB MASK */