X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;ds=sidebyside;f=bertos%2Fhw%2Fhw_sipo.h;h=a5d680ac1688905ac8bf630f7eb6f6d5e5f8d21c;hb=3c52f2762ac5af229124b6deb3a838c5afa47138;hp=6e1fe0e0338c042a98b8d23ade8b19fe07ecaf2a;hpb=3704190e6a2dc9973af0959d7202c61767aadbf5;p=bertos.git diff --git a/bertos/hw/hw_sipo.h b/bertos/hw/hw_sipo.h index 6e1fe0e0..a5d680ac 100644 --- a/bertos/hw/hw_sipo.h +++ b/bertos/hw/hw_sipo.h @@ -26,8 +26,8 @@ * invalidate any other reasons why the executable file might be covered by * the GNU General Public License. * - * Copyright 2003, 2004, 2006, 2008 Develer S.r.l. (http://www.develer.com/) - * Copyright 2000 Bernardo Innocenti + * Copyright 2003, 2004, 2006, 2008, 2009 Develer S.r.l. (http://www.develer.com/) + * Copyright 2000 Bernie Innocenti * All Rights Reserved. * --> * @@ -37,6 +37,7 @@ * \version $Id$ * * \author Andrea Grandi + * \author Daniele Basile */ #ifndef HW_SIPO_H @@ -44,19 +45,78 @@ #warning TODO:This is an example implementation, you must implement it! -#define LOAD_HIGH /* Implement me! */ -#define LOAD_LOW /* Implement me! */ -#define LOAD_INIT /* Implement me! */ -#define SET_SCK_OUT /* Implement me! */ -#define SET_SOUT_OUT /* Implement me! */ -#define CLOCK_HIGH /* Implement me! */ -#define CLOCK_LOW /* Implement me! */ -#define SET_SOUT_HIGH /* Implement me! */ -#define SET_SOUT_LOW /* Implement me! */ -#define CLOCK_PULSE /* Implement me! */ -#define OE_OUT -#define OE_LOW +/** + * Mapping sipo connection on board. + * See scheme to more info. + */ +typedef enum SipoMap { + + /* Add device here */ + + SIPO_CNT +} SipoMap; + + +/** + * Define the macros needed to set the serial input bit of SIPO device + * low or high. + */ +#define SIPO_SI_HIGH() do { /* Implement me! */ } while (0) +#define SIPO_SI_LOW() do { /* Implement me! */ } while (0) + +/** + * Drive pin to load the bit, presented in serial-in pin, + * into sipo shift register. + */ +#define SIPO_SI_CLOCK(clk_pol) + do { \ + /* Implement me! */ \ + (void)clk_pol; \ + } while (0) + +/** + * Clock the content of shift register to output. + */ +#define SIPO_LOAD(device, load_pol) \ + do { \ + /* Implement me! */ \ + (void)device; \ + (void)load_pol; \ + } while (0) +/** + * Enable the shift register output. + */ +#define SIPO_ENABLE() /* Implement me! */ + +/** + * Set logic level for load signal + */ +#define SIPO_SET_LD_LEVEL(device, load_pol) \ + do { \ + /* Implement me! */ \ + (void)device; \ + (void)load_pol; \ + } while (0) + + +/** + * Sel logic level for clock signal + */ +#define SIPO_SET_CLK_LEVEL(clock_pol) \ + do { \ + /* Implement me! */ \ + (void)clock_pol; \ + } while (0) + + +/** + * Do everything needed in order to init the SIPO pins. + */ +#define SIPO_INIT_PIN() \ + do { \ + /* Implement me! */ \ + } while(0) #endif /* HW_SIPO_H */