X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=app%2Ftriface%2Fappconfig.h;h=2308f234e95f2f841d283c4b2d96f7f6a6b9c1c0;hb=99fafc49f3b2d50abb2d7b8b4cbbd3be8e107bef;hp=c7ceca08aa137dc2c19fd0c7cd28128cb787a0a0;hpb=304ab6d368e046801f9c6bab326bbb27f78cb875;p=bertos.git diff --git a/app/triface/appconfig.h b/app/triface/appconfig.h old mode 100755 new mode 100644 index c7ceca08..2308f234 --- a/app/triface/appconfig.h +++ b/app/triface/appconfig.h @@ -1,8 +1,33 @@ -/*! +/** * \file * * * \brief DevLib configuration options @@ -46,6 +71,12 @@ /*#* *#* $Log$ + *#* Revision 1.5 2006/09/20 13:54:40 marco + *#* Added new SPI definitions. + *#* + *#* Revision 1.4 2006/07/19 12:56:25 bernie + *#* Convert to new Doxygen style. + *#* *#* Revision 1.3 2006/06/12 21:37:01 marco *#* implemented some commands (ver and sleep) *#* @@ -107,6 +138,18 @@ /** [bytes] Size of the inbound FIFO buffer for SPI port (AVR only). */ #define CONFIG_SPI_RXBUFSIZE 32 + /** SPI data order (AVR only). */ + #define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + + /** SPI clock division factor (AVR only). */ + #define CONFIG_SPI_CLOCK_DIV 16 + + /** SPI clock polarity: 0 = normal low, 1 = normal high (AVR only). */ + #define CONFIG_SPI_CLOCK_POL 0 + + /** SPI clock phase: 0 = sample on first edge, 1 = sample on second clock edge (AVR only). */ + #define CONFIG_SPI_CLOCK_PHASE 0 + /** Default transmit timeout (ms). Set to -1 to disable timeout support */ #define CONFIG_SER_TXTIMEOUT -1