X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcfg%2Fcfg_adc.h;h=62ee6ed73f34bc223e71e3c0d47003c48fc3b704;hb=7a613efa9f80222fa9642bfb6a249972c7ae6c6e;hp=25eea527ea46997fc20e80d82e05919bd0d28147;hpb=aad4389e6a3837db267b3e78df65c89852121e06;p=bertos.git diff --git a/bertos/cfg/cfg_adc.h b/bertos/cfg/cfg_adc.h index 25eea527..62ee6ed7 100644 --- a/bertos/cfg/cfg_adc.h +++ b/bertos/cfg/cfg_adc.h @@ -30,9 +30,8 @@ * * --> * - * \brief Configuration file for ADC module. + * \brief Configuration file for the ADC module. * - * \version $Id$ * \author Daniele Basile */ @@ -42,56 +41,109 @@ /** * Module logging level. * - * $WIZARD = { "type" : "enum", "value_list" : "log_level" } + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" */ #define ADC_LOG_LEVEL LOG_LVL_INFO /** * Module logging format. * - * $WIZARD = { "type" : "enum", "value_list" : "log_format" } + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" */ #define ADC_LOG_FORMAT LOG_FMT_VERBOSE /** - * Frequency clock for ADC conversion. + * Clock Frequency for ADC conversion. + * This frequency will be rounded down to an integer + * submultiple of CPU_FREQ. * - * $WIZARD = { "type" : "int" } + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + * $WIZ$ max = 5000000 */ #define CONFIG_ADC_CLOCK 4800000UL /** - * Minimum time for startup a conversion in micro second. + * Minimum time for starting up a conversion [us]. * - * $WIZARD = { "type" : "int" } + * $WIZ$ type = "int" + * $WIZ$ min = 20 + * $WIZ$ supports = "at91" */ #define CONFIG_ADC_STARTUP_TIME 20 /** - * Minimum time for sample and hold in nano second. + * Minimum time for sample and hold [ns]. * - * $WIZARD = { "type" : "int" } + * $WIZ$ type = "int" + * $WIZ$ min = 600 + * $WIZ$ supports = "at91" */ #define CONFIG_ADC_SHTIME 834 /** - * ADC setting for AVR target. + * ADC Voltage Reference. * - * $WIZARD = {"type" : "int" } + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" */ -#define CONFIG_ADC_AVR_REF 1 -/* - * ADC setting for AVR target. +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. * - * $WIZARD = {"type" : "int" } + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" */ #define CONFIG_ADC_AVR_DIVISOR 2 /** - * Enable ADS strobe. + * Enable ADC strobe for debugging ADC ISR. * - * $WIZARD = {"type" : "boolean" } + * $WIZ$ type = "boolean" */ #define CONFIG_ADC_STROBE 0 + +/** + * Start up timer[s] = startup value / ADCClock [Hz] + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "sam3_adc_sut" + * $WIZ$ supports = "sam3" + */ +#define CONFIG_ADC_SUT ADC_SUT512 + +/** + * Analog Settling Time[s] = settling value / ADCClock[Hz] + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "sam3_adc_stt" + * $WIZ$ supports = "sam3" + */ +#define CONFIG_ADC_STTLING ADC_AST17 + +/** + * Tracking Time[s] = (TRACKTIM + 1) / ADCClock[Hz] + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "sam3" + */ +#define CONFIG_ADC_TRACKTIM 0 + +/** + * Transfer Period[s] = (TRANSFER * 2 + 3) ADCClock[Hz] + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "sam3" + */ +#define CONFIG_ADC_TRANSFER 1 + #endif /* CFG_ADC_H */