X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcfg%2Fcfg_adc.h;h=df2587be517232fd86b9192faa5c39172c793330;hb=b2cbb10564ee5c9c2a78519973bef71e4db364f9;hp=84a6da3a8881e2928db1d6d9048c25a495b57c65;hpb=515886be3106584a6d695d4b5453730121b91f74;p=bertos.git diff --git a/bertos/cfg/cfg_adc.h b/bertos/cfg/cfg_adc.h index 84a6da3a..df2587be 100644 --- a/bertos/cfg/cfg_adc.h +++ b/bertos/cfg/cfg_adc.h @@ -30,39 +30,83 @@ * * --> * - * \brief Configuration file for ADC module. + * \brief Configuration file for the ADC module. * - * \version $Id$ * \author Daniele Basile */ #ifndef CFG_ADC_H #define CFG_ADC_H -/// Module logging level. +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ #define ADC_LOG_LEVEL LOG_LVL_INFO -/// Module logging format. +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ #define ADC_LOG_FORMAT LOG_FMT_VERBOSE /** - * ADC timing setting parameter + * Clock Frequency for ADC conversion. + * This frequency will be rounded down to an integer + * submultiple of CPU_FREQ. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + * $WIZ$ max = 5000000 + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 20 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [ns]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 600 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. * - * - CONFIG_ADC_CLOCK is frequency clock for ADC conversion. - * - CONFIG_ADC_STARTUP_TIME minimum time for startup a conversion in micro second. - * - CONFIG_ADC_SHTIME minimum time for sample and hold in nano second. - * \{ + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" */ -#define CONFIG_ADC_CLOCK 4800000UL -#define CONFIG_ADC_STARTUP_TIME 20 -#define CONFIG_ADC_SHTIME 834 -/* \ * } */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC -/// ADC setting for AVR target -#define CONFIG_ADC_AVR_REF 1 +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ #define CONFIG_ADC_AVR_DIVISOR 2 -/// Enable ADS strobe. +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ #define CONFIG_ADC_STROBE 0 #endif /* CFG_ADC_H */