X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcfg%2Fcfg_ser.h;h=91a10e0b2d8ade049eeb03b95150797d6728a29f;hb=5579f0a02cd782e3df7849e2f84640bd1160e232;hp=dba27153e76253c6ef58df64388f0a8a835df181;hpb=341eb0f84a2592c0674ac67f2418b1db27e8d3ac;p=bertos.git

diff --git a/bertos/cfg/cfg_ser.h b/bertos/cfg/cfg_ser.h
index dba27153..91a10e0b 100644
--- a/bertos/cfg/cfg_ser.h
+++ b/bertos/cfg/cfg_ser.h
@@ -32,8 +32,6 @@
  *
  * \brief Configuration file for serial module.
  *
- * \version $Id$
- *
  * \author Daniele Basile <asterix@develer.com>
  */
 
@@ -64,7 +62,7 @@
  * Size of the outbound FIFO buffer for port 1 [bytes].
  * $WIZ$ type = "int"
  * $WIZ$ min = 2
- * $WIZ$ supports = "at91 and not atmega8 and not atmega168 and not atmega32"
+ * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)"
  */
 #define CONFIG_UART1_TXBUFSIZE  32
 
@@ -72,7 +70,7 @@
  * Size of the inbound FIFO buffer for port 1 [bytes].
  * $WIZ$ type = "int"
  * $WIZ$ min = 2
- * $WIZ$ supports = "at91 and not atmega8 and not atmega168 and not atmega32"
+ * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)"
  */
 #define CONFIG_UART1_RXBUFSIZE  32
 
@@ -80,7 +78,7 @@
  * Size of the outbound FIFO buffer for port 2 [bytes].
  * $WIZ$ type = "int"
  * $WIZ$ min = 2
- * $WIZ$ supports = "lm3s"
+ * $WIZ$ supports = "lm3s or lpc2"
  */
 #define CONFIG_UART2_TXBUFSIZE  32
 
@@ -88,10 +86,26 @@
  * Size of the inbound FIFO buffer for port 2 [bytes].
  * $WIZ$ type = "int"
  * $WIZ$ min = 2
- * $WIZ$ supports = "lm3s"
+ * $WIZ$ supports = "lm3s or lpc2"
  */
 #define CONFIG_UART2_RXBUFSIZE  32
 
+/**
+ * Size of the outbound FIFO buffer for port 3 [bytes].
+ * $WIZ$ type = "int"
+ * $WIZ$ min = 2
+ * $WIZ$ supports = "lpc2"
+ */
+#define CONFIG_UART3_TXBUFSIZE  32
+
+/**
+ * Size of the inbound FIFO buffer for port 3 [bytes].
+ * $WIZ$ type = "int"
+ * $WIZ$ min = 2
+ * $WIZ$ supports = "lpc2"
+ */
+#define CONFIG_UART3_RXBUFSIZE  32
+
 
 /**
  * Size of the outbound FIFO buffer for SPI port [bytes].