X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcfg%2Fcfg_ser.h;h=91a10e0b2d8ade049eeb03b95150797d6728a29f;hb=d7a12b736e49a6df0ed3d045719eac8bc0e43b10;hp=38fcff1c32cb96d62721e99df226dd35d05f398c;hpb=e8237d1ba10ea77ec0a167bcadf2b778659750f0;p=bertos.git diff --git a/bertos/cfg/cfg_ser.h b/bertos/cfg/cfg_ser.h index 38fcff1c..91a10e0b 100644 --- a/bertos/cfg/cfg_ser.h +++ b/bertos/cfg/cfg_ser.h @@ -32,8 +32,6 @@ * * \brief Configuration file for serial module. * - * \version $Id$ - * * \author Daniele Basile */ @@ -64,7 +62,7 @@ * Size of the outbound FIFO buffer for port 1 [bytes]. * $WIZ$ type = "int" * $WIZ$ min = 2 - * $WIZ$ supports = "at91 and not atmega8 and not atmega168 and not atmega32" + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" */ #define CONFIG_UART1_TXBUFSIZE 32 @@ -72,10 +70,42 @@ * Size of the inbound FIFO buffer for port 1 [bytes]. * $WIZ$ type = "int" * $WIZ$ min = 2 - * $WIZ$ supports = "at91 and not atmega8 and not atmega168 and not atmega32" + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" */ #define CONFIG_UART1_RXBUFSIZE 32 +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + /** * Size of the outbound FIFO buffer for SPI port [bytes]. @@ -172,7 +202,11 @@ */ #define CONFIG_SER_RXTIMEOUT -1 -/// Use RTS/CTS handshake. $WIZ$ type = "boolean" +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ #define CONFIG_SER_HWHANDSHAKE 0 /** @@ -182,7 +216,7 @@ */ #define CONFIG_SER_DEFBAUDRATE 0UL -/// Enable strobe pin for serial debug. $WIZ$ type = "boolean" +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" #define CONFIG_SER_STROBE 0 #endif /* CFG_SER_H */