X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Farm%2Fdrv%2Fpwm_at91.c;h=397240ec2318f51e6971c52c3639aee3f5796351;hb=b46f64914c62fbb0297728280478681659469654;hp=e0706812d83718142d56f82b54f52bf23b8f259e;hpb=515886be3106584a6d695d4b5453730121b91f74;p=bertos.git

diff --git a/bertos/cpu/arm/drv/pwm_at91.c b/bertos/cpu/arm/drv/pwm_at91.c
index e0706812..397240ec 100644
--- a/bertos/cpu/arm/drv/pwm_at91.c
+++ b/bertos/cpu/arm/drv/pwm_at91.c
@@ -33,13 +33,12 @@
  *
  * \brief PWM hardware-specific implementation
  *
- * \version $Id$
  * \author Daniele Basile <asterix@develer.com>
  */
 
 #include "pwm_at91.h"
 #include "hw/pwm_map.h"
-#include "hw/hw_cpu.h"
+#include <hw/hw_cpufreq.h>
 #include "cfg/cfg_pwm.h"
 
 // Define logging setting (for cfg/log.h module).
@@ -120,8 +119,8 @@ void pwm_hw_setFrequency(PwmDev dev, uint32_t freq)
 
 	for(int i = 0; i <= PWM_HW_MAX_PRESCALER_STEP; i++)
 	{
-		period = CLOCK_FREQ / (BV(i) * freq);
-// 		LOG_INFO("period[%ld], prescale[%d]\n", period, i);
+		period = CPU_FREQ / (BV(i) * freq);
+ 		LOG_INFO("period[%ld], prescale[%d]\n", period, i);
 		if ((period < PWM_HW_MAX_PERIOD) && (period != 0))
 		{
 			//Clean previous channel prescaler, and set new
@@ -146,35 +145,36 @@ void pwm_hw_setDutyUnlock(PwmDev dev, uint16_t duty)
 	ASSERT(duty <= (uint16_t)*pwm_map[dev].period_reg);
 
 
+	/*
+	 * If polarity flag is true we must invert
+	 * PWM polarity.
+	 */
+	if (pwm_map[dev].pol)
+	{
+		duty = (uint16_t)*pwm_map[dev].period_reg - duty;
+		LOG_INFO("Inverted duty[%d], pol[%d]\n", duty, pwm_map[dev].pol);
+	}
+
 	/*
 	 * WARNING: is forbidden to write 0 to duty cycle value,
 	 * and so for duty = 0 we must enable PIO and clear output!
 	 */
 	if (!duty)
 	{
-		PWM_PIO_PER = pwm_map[dev].pwm_pin;
+		PWM_PIO_CODR = pwm_map[dev].pwm_pin;
+		PWM_PIO_PER  = pwm_map[dev].pwm_pin;
 		pwm_map[dev].duty_zero = true;
 	}
 	else
 	{
-		ASSERT(PWM_CCNT0);
-        /*
-         * If polarity flag is true we must invert
-         * PWM polarity.
-         */
-        if (pwm_map[dev].pol)
-        {
-                duty = (uint16_t)*pwm_map[dev].period_reg - duty;
-				LOG_INFO("Inverted duty[%d], pol[%d]\n", duty, pwm_map[dev].pol);
-        }
-
 		PWM_PIO_PDR = pwm_map[dev].pwm_pin;
+		PWM_PIO_ABSR = pwm_map[dev].pwm_pin;
+
 		*pwm_map[dev].update_reg = duty;
 		pwm_map[dev].duty_zero = false;
 	}
 
 	PWM_ENA = BV(dev);
-
 	LOG_INFO("PWM ch[%d] duty[%d], period[%ld]\n", dev, duty, *pwm_map[dev].period_reg);
 }
 
@@ -185,7 +185,10 @@ void pwm_hw_setDutyUnlock(PwmDev dev, uint16_t duty)
 void pwm_hw_enable(PwmDev dev)
 {
 	if (!pwm_map[dev].duty_zero)
-		PWM_PIO_PDR = pwm_map[dev].pwm_pin;
+	{
+		PWM_PIO_PDR  = pwm_map[dev].pwm_pin;
+		PWM_PIO_ABSR = pwm_map[dev].pwm_pin;
+	}
 }
 
 /**
@@ -221,8 +224,8 @@ void pwm_hw_init(void)
 	 * - Power on PWM
 	 */
 	PWM_PIO_CODR = BV(PWM0) | BV(PWM1) | BV(PWM2) | BV(PWM3);
-	PWM_PIO_OER = BV(PWM0) | BV(PWM1) | BV(PWM2) | BV(PWM3);
-	PWM_PIO_PDR = BV(PWM0) | BV(PWM1) | BV(PWM2) | BV(PWM3);
+	PWM_PIO_OER  = BV(PWM0) | BV(PWM1) | BV(PWM2) | BV(PWM3);
+	PWM_PIO_PDR  = BV(PWM0) | BV(PWM1) | BV(PWM2) | BV(PWM3);
 	PWM_PIO_ABSR = BV(PWM0) | BV(PWM1) | BV(PWM2) | BV(PWM3);
 	PMC_PCER |= BV(PWMC_ID);