X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Farm%2Fdrv%2Fpwm_at91.c;h=76a53d398482aa88e0a4dee9a57dc7279235d84c;hb=bdcc52e5f18159cadc413c53dd14ef468a6de376;hp=b1fda46fd1dac58b08bb867cefd5edc39a5365f5;hpb=c3946aa680a46e466e33c797d9ee93c5433964c4;p=bertos.git

diff --git a/bertos/cpu/arm/drv/pwm_at91.c b/bertos/cpu/arm/drv/pwm_at91.c
index b1fda46f..76a53d39 100644
--- a/bertos/cpu/arm/drv/pwm_at91.c
+++ b/bertos/cpu/arm/drv/pwm_at91.c
@@ -39,14 +39,14 @@
  */
 
 #include "pwm_at91.h"
-
-#include <hw/hw_cpu.h>
+#include "hw/pwm_map.h"
+#include "hw/hw_cpu.h"
 
 #include <cfg/macros.h>
 #include <cfg/debug.h>
+
 #include <io/arm.h>
 
-#include "appconfig.h"
 
 /**
  * Register structure for pwm driver.
@@ -57,6 +57,7 @@ static PwmChannel pwm_map[PWM_CNT] =
 {
 	{//PWM Channel 0
 		.duty_zero = false,
+		.pol = false,
 		.pwm_pin = BV(PWM0),
 		.mode_reg = &PWM_CMR0,
 		.duty_reg = &PWM_CDTY0,
@@ -65,6 +66,7 @@ static PwmChannel pwm_map[PWM_CNT] =
 	},
 	{//PWM Channel 1
 		.duty_zero = false,
+		.pol = false,
 		.pwm_pin = BV(PWM1),
 		.mode_reg = &PWM_CMR1,
 		.duty_reg = &PWM_CDTY1,
@@ -73,6 +75,7 @@ static PwmChannel pwm_map[PWM_CNT] =
 	},
 	{//PWM Channel 2
 		.duty_zero = false,
+        .pol = false,
 		.pwm_pin = BV(PWM2),
 		.mode_reg = &PWM_CMR2,
 		.duty_reg = &PWM_CDTY2,
@@ -81,6 +84,7 @@ static PwmChannel pwm_map[PWM_CNT] =
 	},
 	{//PWM Channel 3
 		.duty_zero = false,
+		.pol = false,
 		.pwm_pin = BV(PWM3),
 		.mode_reg = &PWM_CMR3,
 		.duty_reg = &PWM_CDTY3,
@@ -112,7 +116,7 @@ void pwm_hw_setFrequency(PwmDev dev, uint32_t freq)
 	for(int i = 0; i <= PWM_HW_MAX_PRESCALER_STEP; i++)
 	{
 		period = CLOCK_FREQ / (BV(i) * freq);
-// 		TRACEMSG("period[%d], prescale[%d]", period, i);
+// 		TRACEMSG("period[%ld], prescale[%d]", period, i);
 		if ((period < PWM_HW_MAX_PERIOD) && (period != 0))
 		{
 			//Clean previous channel prescaler, and set new
@@ -124,9 +128,7 @@ void pwm_hw_setFrequency(PwmDev dev, uint32_t freq)
 		}
 	}
 
-	PWM_ENA = BV(dev);
-
-// 	TRACEMSG("PWM ch[%d] period[%d]", dev, period);
+ 	TRACEMSG("PWM ch[%d] period[%ld]", dev, period);
 }
 
 /**
@@ -151,11 +153,23 @@ void pwm_hw_setDutyUnlock(PwmDev dev, uint16_t duty)
 	else
 	{
 		ASSERT(PWM_CCNT0);
+        /*
+         * If polarity flag is true we must invert
+         * PWM polarity.
+         */
+        if (pwm_map[dev].pol)
+        {
+            duty = (uint16_t)*pwm_map[dev].period_reg - duty;
+//            TRACEMSG("Inverted duty[%d], pol[%d]", duty, pwm_map[dev].pol);
+        }
+
 		PWM_PIO_PDR = pwm_map[dev].pwm_pin;
 		*pwm_map[dev].update_reg = duty;
 		pwm_map[dev].duty_zero = false;
 	}
 
+	PWM_ENA = BV(dev);
+
 // 	TRACEMSG("PWM ch[%d] duty[%d], period[%ld]", dev, duty, *pwm_map[dev].period_reg);
 }
 
@@ -177,6 +191,14 @@ void pwm_hw_disable(PwmDev dev)
 	PWM_PIO_PER = pwm_map[dev].pwm_pin;
 }
 
+/**
+ * Set PWM polarity to select pwm channel
+ */
+void pwm_hw_setPolarity(PwmDev dev, bool pol)
+{
+	pwm_map[dev].pol = pol;
+//    TRACEMSG("Set pol[%d]", pwm_map[dev].pol);
+}
 
 /**
  * Init pwm.
@@ -207,10 +229,14 @@ void pwm_hw_init(void)
 	/*
 	 * Set pwm mode:
 	 * - set period alidned to left
-	 * - set output waveform to low level
+	 * - set output waveform to start at high level
 	 * - allow duty cycle modify at next period event
 	 */
 	for (int ch = 0; ch < PWM_CNT; ch++)
+	{
 		*pwm_map[ch].mode_reg = 0;
+		*pwm_map[ch].mode_reg = BV(PWM_CPOL);
+	}
+
 }