X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Farm%2Fhw%2Fcrtat91sam7_rom.S;h=c5317847769262965a9e47f833792a5c78937080;hb=4fe8ed0dfe9bb7cc026aa920ea406abc8ff5cbf6;hp=0857795b2556ba4dc977cff198d78c24b98f33b3;hpb=76c6d43c05630ad4b3a9c86f99a2b9e7c835272a;p=bertos.git diff --git a/bertos/cpu/arm/hw/crtat91sam7_rom.S b/bertos/cpu/arm/hw/crtat91sam7_rom.S index 0857795b..c5317847 100644 --- a/bertos/cpu/arm/hw/crtat91sam7_rom.S +++ b/bertos/cpu/arm/hw/crtat91sam7_rom.S @@ -70,20 +70,19 @@ * */ -#include "hw/hw_cpu.h" #include #include "cfg/cfg_arch.h" -#if CLOCK_FREQ != 48023000L +#if CPU_FREQ != 48023000L /* Avoid errors on nightly test */ #if !defined(ARCH_NIGHTTEST) || !(ARCH & ARCH_NIGHTTEST) - #error Clock registers set for 48MHz operation, revise following code if you want a different clock. + #warning Clock registers set for 48.023MHz operation, revise following code if you want a different clock. #endif #endif -#if CPU_ARM_AT91SAM7S256 || CPU_ARM_AT91SAM7X256 || CPU_ARM_AT91SAM7X128 +#if CPU_ARM_SAM7S_LARGE || CPU_ARM_SAM7X /** * With a 18.420MHz cristal, master clock is: * (((18.420 * PLL_MUL_VAL + 1) / PLL_DIV_VAL) / AT91MCK_PRES) = 48.023MHz