X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Farm%2Fhw%2Fvectors_lpc2.S;h=06d0a7df6ad0edeb85cfb9b4eb385ff22eacbd50;hb=2c8af54b2053cae5a6b5ff073cfd94606b21920a;hp=d5568fb971dcc2225b2aac2628f73546c7f4b40c;hpb=f989f600755eda606c6c9853bb229bec47bebbc0;p=bertos.git diff --git a/bertos/cpu/arm/hw/vectors_lpc2.S b/bertos/cpu/arm/hw/vectors_lpc2.S index d5568fb9..06d0a7df 100644 --- a/bertos/cpu/arm/hw/vectors_lpc2.S +++ b/bertos/cpu/arm/hw/vectors_lpc2.S @@ -35,6 +35,7 @@ * \brief NXP LPC2xxx interrupt vectors. */ +#include #include "cfg/cfg_arch.h" #if defined(ARCH_NIGHTTEST) && (ARCH & ARCH_NIGHTTEST) /* Avoid errors during nigthly test */ @@ -53,9 +54,16 @@ __vectors: ldr pc, _swi /* Software interrupt */ ldr pc, _prefetch_abort /* Prefetch abort */ ldr pc, _data_abort /* Data abort */ +#if CPU_ARM_LPC2378 + .word 0xb9206e58 /* In LPX2xxx, this location holds the checksum of the previous vectors */ + ldr pc, [pc, #-0x120] /* Use VIC */ +#else .word 0xb9205f88 /* In LPX2xxx, this location holds the checksum of the previous vectors */ - + #if CPU_ARM_LPC2 + #warning Check correct VICAddress register for this CPU, default set to 0xFFFFF030 + #endif ldr pc, [pc, #-0xFF0] /* Use VIC */ +#endif ldr pc, _fiq /* Fast interrupt request */ _init: .word __init