X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Farm%2Fhw%2Fvectors_lpc2.S;h=06d0a7df6ad0edeb85cfb9b4eb385ff22eacbd50;hb=57fa5e371a8b40afc99b922731b77d17c55330a4;hp=71d700b841e61140665c857417d4ebeb4b51224e;hpb=084397f989388e619539d6ed961eaf2d57295f6b;p=bertos.git diff --git a/bertos/cpu/arm/hw/vectors_lpc2.S b/bertos/cpu/arm/hw/vectors_lpc2.S index 71d700b8..06d0a7df 100644 --- a/bertos/cpu/arm/hw/vectors_lpc2.S +++ b/bertos/cpu/arm/hw/vectors_lpc2.S @@ -35,6 +35,13 @@ * \brief NXP LPC2xxx interrupt vectors. */ +#include +#include "cfg/cfg_arch.h" +#if defined(ARCH_NIGHTTEST) && (ARCH & ARCH_NIGHTTEST) + /* Avoid errors during nigthly test */ + #define __vectors __vectors_lpc2 +#endif + /* * Section 0: Vector table and reset entry. */ @@ -47,9 +54,16 @@ __vectors: ldr pc, _swi /* Software interrupt */ ldr pc, _prefetch_abort /* Prefetch abort */ ldr pc, _data_abort /* Data abort */ +#if CPU_ARM_LPC2378 + .word 0xb9206e58 /* In LPX2xxx, this location holds the checksum of the previous vectors */ + ldr pc, [pc, #-0x120] /* Use VIC */ +#else .word 0xb9205f88 /* In LPX2xxx, this location holds the checksum of the previous vectors */ - + #if CPU_ARM_LPC2 + #warning Check correct VICAddress register for this CPU, default set to 0xFFFFF030 + #endif ldr pc, [pc, #-0xFF0] /* Use VIC */ +#endif ldr pc, _fiq /* Fast interrupt request */ _init: .word __init