X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Fattr.h;h=185da4cc07296ef8eb947adf20c390c2c79cfb0a;hb=6447257f41c6d0f3d6b7a486e2683f930a5afdd3;hp=5e24fa3c9d3ee7b57ae6d19ad36212f2798789a5;hpb=6a566c9b4ad8efa9ee8432942b85ba31ffb469f8;p=bertos.git

diff --git a/bertos/cpu/attr.h b/bertos/cpu/attr.h
index 5e24fa3c..185da4cc 100644
--- a/bertos/cpu/attr.h
+++ b/bertos/cpu/attr.h
@@ -109,6 +109,8 @@
 	/// Valid pointers should be >= than this value (used for debug)
 	#if CPU_ARM_AT91
 		#define CPU_RAM_START		0x00200000
+	#elif CPU_ARM_LPC2
+		#define CPU_RAM_START		0x40000000
 	#else
 		#warning Fix CPU_RAM_START address for your ARM, default value set to 0x200
 		#define CPU_RAM_START		0x200
@@ -165,11 +167,11 @@
 #elif CPU_CM3
 
 	#define CPU_REG_BITS           32
-	#define CPU_REGS_CNT           fixme
+	#define CPU_REGS_CNT           16
 	#define CPU_HARVARD            0
 
 	/// Valid pointers should be >= than this value (used for debug)
-	#if CPU_CM3_LM3S1968
+	#if (CPU_CM3_LM3S1968 || CPU_CM3_LM3S8962 || CPU_CM3_STM32P103)
 		#define CPU_RAM_START 0x20000000
 	#else
 		#warning Fix CPU_RAM_START address for your Cortex-M3, default value set to 0x200
@@ -181,10 +183,11 @@
 	#elif defined(__ARMEL__)
 		#define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
 	#else
-		#error Unable to detect Cortex-M3 endianness!
+		#error Unable to detect Cortex-M3 endianess!
 	#endif
 
-	#define NOP         fixme
+	#define NOP         asm volatile ("nop")
+	#define PAUSE       asm volatile ("wfi" ::: "memory")
 	#define BREAKPOINT  /* asm("bkpt 0") DOES NOT WORK */
 
 #elif CPU_PPC