X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Fattr.h;h=798969901cbcc59f1d626b99f522a6435b2f8ec4;hb=e7c081bcf578efdfe4f0091c9eaba6e6d657c720;hp=a317f1e810f1d9d86243df4a33efaf0a0f0d88fb;hpb=e70f6f970d71ec732182636bfb8086cdc6ec3e10;p=bertos.git diff --git a/bertos/cpu/attr.h b/bertos/cpu/attr.h index a317f1e8..79896990 100644 --- a/bertos/cpu/attr.h +++ b/bertos/cpu/attr.h @@ -171,7 +171,7 @@ #define CPU_HARVARD 0 /// Valid pointers should be >= than this value (used for debug) - #if CPU_CM3_LM3S1968 + #if (CPU_CM3_LM3S1968 || CPU_CM3_LM3S8962 || CPU_CM3_STM32F103RB) #define CPU_RAM_START 0x20000000 #else #warning Fix CPU_RAM_START address for your Cortex-M3, default value set to 0x200 @@ -190,21 +190,6 @@ #define PAUSE asm volatile ("wfi" ::: "memory") #define BREAKPOINT /* asm("bkpt 0") DOES NOT WORK */ - /* - * FIXME: builtin GCC memset() can be buggy! We need to redefine it - * here for this architecture. :( - */ - #include - #define memset __cm3_memset - INLINE void *__cm3_memset(void *s, int c, size_t n) - { - uint8_t *p = (uint8_t *)s; - - while (n--) - *p++ = c; - return s; - } - #elif CPU_PPC #define CPU_REG_BITS (CPU_PPC32 ? 32 : 64) @@ -254,7 +239,7 @@ #define CPU_RAM_START 0x60 #elif CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P #define CPU_RAM_START 0x100 - #elif CPU_AVR_ATMEGA1281 + #elif CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 #define CPU_RAM_START 0x200 #else #warning Fix CPU_RAM_START address for your AVR, default value set to 0x100