X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Fattr.h;h=832f0618698c724945f7196dfaf97e30cf790404;hb=32d1445272120a254d77ce8d1af1f527da7a2c17;hp=02c745e57fb2819f68db50f3e5025c8036b5979a;hpb=2ce39c1d757d9214774af12185522c72727bcdf4;p=bertos.git diff --git a/bertos/cpu/attr.h b/bertos/cpu/attr.h index 02c745e5..832f0618 100644 --- a/bertos/cpu/attr.h +++ b/bertos/cpu/attr.h @@ -28,7 +28,6 @@ * * Copyright 2004, 2005, 2006, 2007, 2008 Develer S.r.l. (http://www.develer.com/) * Copyright 2004 Giovanni Bajo - * * --> * * \brief CPU-specific attributes. @@ -43,6 +42,7 @@ #include "detect.h" +#include "cfg/cfg_proc.h" /* CONFIG_KERN_PREEMPT */ #include "cfg/cfg_attr.h" /* CONFIG_FAST_MEM */ @@ -75,8 +75,6 @@ #elif CPU_X86 - #define NOP asm volatile ("nop") - #define CPU_REGS_CNT 7 #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN #define CPU_HARVARD 0 @@ -93,7 +91,14 @@ #endif /// Valid pointers should be >= than this value (used for debug) - #define CPU_RAM_START 0x1000 + #define CPU_RAM_START 0x1000 + + #ifdef __GNUC__ + #define NOP asm volatile ("nop") + /* This is a good thing to insert into busy-wait loops. */ + #define PAUSE asm volatile ("rep; nop" ::: "memory") + #define BREAKPOINT asm volatile ("int3" ::) + #endif #elif CPU_ARM @@ -102,7 +107,12 @@ #define CPU_HARVARD 0 /// Valid pointers should be >= than this value (used for debug) - #define CPU_RAM_START 0x200 + #if CPU_ARM_AT91 + #define CPU_RAM_START 0x00200000 + #else + #warning Fix CPU_RAM_START address for your ARM, default value set to 0x200 + #define CPU_RAM_START 0x200 + #endif #ifdef __IAR_SYSTEMS_ICC__ #warning Check CPU_BYTE_ORDER @@ -121,6 +131,7 @@ #endif #define NOP asm volatile ("mov r0,r0" ::) + #define BREAKPOINT /* asm("bkpt 0") DOES NOT WORK */ #if CONFIG_FAST_MEM /** @@ -145,28 +156,29 @@ #define FAST_FUNC /**/ #endif - /** - * Function attribute to declare an interrupt service routine. + /* + * Function attribute to move it into ram memory. */ - #define ISR_FUNC __attribute__((interrupt)) + #define RAM_FUNC __attribute__((section(".data"))) #endif /* !__IAR_SYSTEMS_ICC_ */ #elif CPU_PPC - #define NOP asm volatile ("nop" ::) - #define CPU_REG_BITS (CPU_PPC32 ? 32 : 64) #define CPU_REGS_CNT FIXME #define CPU_BYTE_ORDER (__BIG_ENDIAN__ ? CPU_BIG_ENDIAN : CPU_LITTLE_ENDIAN) #define CPU_HARVARD 0 /// Valid pointers should be >= than this value (used for debug) - #define CPU_RAM_START 0x1000 + #define CPU_RAM_START 0x1000 -#elif CPU_DSP56K + #ifdef __GNUC__ + #define NOP asm volatile ("nop" ::) + #define BREAKPOINT asm volatile ("twge 2,2" ::) + #endif - #define NOP asm(nop) +#elif CPU_DSP56K #define CPU_REG_BITS 16 #define CPU_REGS_CNT FIXME @@ -181,7 +193,10 @@ #define SIZEOF_PTR 1 /// Valid pointers should be >= than this value (used for debug) - #define CPU_RAM_START 0x200 + #define CPU_RAM_START 0x200 + + #define NOP asm(nop) + #define BREAKPOINT asm(debug) #elif CPU_AVR @@ -193,12 +208,25 @@ #define CPU_HARVARD 1 /// Valid pointers should be >= than this value (used for debug) - #define CPU_RAM_START 0x100 + #if CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA32 || CPU_AVR_ATMEGA103 + #define CPU_RAM_START 0x60 + #elif CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA168 + #define CPU_RAM_START 0x100 + #elif CPU_AVR_ATMEGA1281 + #define CPU_RAM_START 0x200 + #else + #warning Fix CPU_RAM_START address for your AVR, default value set to 0x100 + #define CPU_RAM_START 0x100 + #endif #else #error No CPU_... defined. #endif +#ifndef BREAKPOINT +#define BREAKPOINT /* nop */ +#endif + #ifndef FAST_FUNC /// Function attribute for use with performance critical code. #define FAST_FUNC /* */ @@ -209,4 +237,9 @@ #define FAST_RODATA /* */ #endif +#ifndef PAUSE + /// Generic PAUSE implementation. + #define PAUSE {NOP; MEMORY_BARRIER;} +#endif + #endif /* CPU_ATTR_H */