X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Favr%2Fdrv%2Fadc_avr.c;h=7e932f62ecd1e2d1751058c7450f735d1f68978c;hb=4208123bfbccd41e7c684fa5e5fb13f1e472fcf0;hp=0aae674332faf44875a6fc7ce9f6aa2a161c294c;hpb=b3fe69febaf2e2e41937b0f0e0dfad9b5fcbc3a5;p=bertos.git

diff --git a/bertos/cpu/avr/drv/adc_avr.c b/bertos/cpu/avr/drv/adc_avr.c
index 0aae6743..7e932f62 100644
--- a/bertos/cpu/avr/drv/adc_avr.c
+++ b/bertos/cpu/avr/drv/adc_avr.c
@@ -31,7 +31,6 @@
  *
  * \brief ADC hardware-specific definition
  *
- * \version $Id$
  * \author Francesco Sacchi <batt@develer.com>
  *
  * This module is automatically included so no need to include
@@ -100,7 +99,13 @@
 void adc_hw_select_ch(uint8_t ch)
 {
 	/* Set to 0 all mux registers */
-	ADMUX &= ~(BV(MUX4) | BV(MUX3) | BV(MUX2) | BV(MUX1) | BV(MUX0));
+	#if CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA328P || CPU_AVR_ATMEGA168
+		ADMUX &= ~(BV(MUX3) | BV(MUX2) | BV(MUX1) | BV(MUX0));
+	#elif CPU_AVR_ATMEGA32 || CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281
+		ADMUX &= ~(BV(MUX4) | BV(MUX3) | BV(MUX2) | BV(MUX1) | BV(MUX0));
+	#else
+		#error Unknown CPU
+	#endif
 
 	/* Select channel, only first 8 channel modes are supported for now */
 	ADMUX |= (ch & 0x07);