X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Favr%2Fdrv%2Fi2c_avr.c;h=2681bb75cdab39144fa33f1e8bdd00e80eab12cd;hb=03c14d1d807783de7b8560727843802c00b19d0f;hp=cd7a4ebf81e47e9355d2bfe33660fbcc5dce23d4;hpb=6923bfe0dd9c0e6217819249255e5560bbfe1fb7;p=bertos.git diff --git a/bertos/cpu/avr/drv/i2c_avr.c b/bertos/cpu/avr/drv/i2c_avr.c index cd7a4ebf..2681bb75 100644 --- a/bertos/cpu/avr/drv/i2c_avr.c +++ b/bertos/cpu/avr/drv/i2c_avr.c @@ -38,11 +38,15 @@ * \author Bernie Innocenti */ -#include "i2c_avr.h" - #include "hw/hw_cpu.h" /* CLOCK_FREQ */ #include "cfg/cfg_i2c.h" + +#define LOG_LEVEL I2C_LOG_LEVEL +#define LOG_FORMAT I2C_LOG_FORMAT + +#include + #include #include // BV() #include @@ -50,6 +54,7 @@ #include #include #include +#include #include @@ -57,15 +62,12 @@ /* Wait for TWINT flag set: bus is ready */ #define WAIT_TWI_READY do {} while (!(TWCR & BV(TWINT))) -#define READ_BIT BV(0) - - /** * Send START condition on the bus. * * \return true on success, false otherwise. */ -static bool i2c_start(void) +static bool i2c_builtin_start(void) { TWCR = BV(TWINT) | BV(TWSTA) | BV(TWEN); WAIT_TWI_READY; @@ -73,7 +75,7 @@ static bool i2c_start(void) if (TW_STATUS == TW_START || TW_STATUS == TW_REP_START) return true; - kprintf("!TW_(REP)START: %x\n", TWSR); + LOG_ERR("!TW_(REP)START: %x\n", TWSR); return false; } @@ -85,7 +87,7 @@ static bool i2c_start(void) * * \return true on success, false otherwise. */ -bool i2c_start_w(uint8_t id) +bool i2c_builtin_start_w(uint8_t id) { /* * Loop on the select write sequence: when the eeprom is busy @@ -94,9 +96,9 @@ bool i2c_start_w(uint8_t id) * keep trying until the eeprom responds with an ACK. */ ticks_t start = timer_clock(); - while (i2c_start()) + while (i2c_builtin_start()) { - TWDR = id & ~READ_BIT; + TWDR = id & ~I2C_READBIT; TWCR = BV(TWINT) | BV(TWEN); WAIT_TWI_READY; @@ -104,12 +106,12 @@ bool i2c_start_w(uint8_t id) return true; else if (TW_STATUS != TW_MT_SLA_NACK) { - kprintf("!TW_MT_SLA_(N)ACK: %x\n", TWSR); + LOG_ERR("!TW_MT_SLA_(N)ACK: %x\n", TWSR); break; } else if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT)) { - kprintf("Timeout on TWI_MT_START\n"); + LOG_ERR("Timeout on TWI_MT_START\n"); break; } } @@ -125,18 +127,18 @@ bool i2c_start_w(uint8_t id) * * \return true on success, false otherwise. */ -bool i2c_start_r(uint8_t id) +bool i2c_builtin_start_r(uint8_t id) { - if (i2c_start()) + if (i2c_builtin_start()) { - TWDR = id | READ_BIT; + TWDR = id | I2C_READBIT; TWCR = BV(TWINT) | BV(TWEN); WAIT_TWI_READY; if (TW_STATUS == TW_MR_SLA_ACK) return true; - kprintf("!TW_MR_SLA_ACK: %x\n", TWSR); + LOG_ERR("!TW_MR_SLA_ACK: %x\n", TWSR); } return false; @@ -146,7 +148,7 @@ bool i2c_start_r(uint8_t id) /** * Send STOP condition. */ -void i2c_stop(void) +void i2c_builtin_stop(void) { TWCR = BV(TWINT) | BV(TWEN) | BV(TWSTO); } @@ -158,14 +160,14 @@ void i2c_stop(void) * * \return true on success, false on error. */ -bool i2c_put(const uint8_t data) +bool i2c_builtin_put(const uint8_t data) { TWDR = data; TWCR = BV(TWINT) | BV(TWEN); WAIT_TWI_READY; if (TW_STATUS != TW_MT_DATA_ACK) { - kprintf("!TW_MT_DATA_ACK: %x\n", TWSR); + LOG_ERR("!TW_MT_DATA_ACK: %x\n", TWSR); return false; } return true; @@ -179,7 +181,7 @@ bool i2c_put(const uint8_t data) * * \return the byte read if ok, EOF on errors. */ -int i2c_get(bool ack) +int i2c_builtin_get(bool ack) { TWCR = BV(TWINT) | BV(TWEN) | (ack ? BV(TWEA) : 0); WAIT_TWI_READY; @@ -188,7 +190,7 @@ int i2c_get(bool ack) { if (TW_STATUS != TW_MR_DATA_ACK) { - kprintf("!TW_MR_DATA_ACK: %x\n", TWSR); + LOG_ERR("!TW_MR_DATA_ACK: %x\n", TWSR); return EOF; } } @@ -196,7 +198,7 @@ int i2c_get(bool ack) { if (TW_STATUS != TW_MR_DATA_NACK) { - kprintf("!TW_MR_DATA_NACK: %x\n", TWSR); + LOG_ERR("!TW_MR_DATA_NACK: %x\n", TWSR); return EOF; } } @@ -205,70 +207,12 @@ int i2c_get(bool ack) return (int)(uint8_t)TWDR; } - -/** - * Send a sequence of bytes in master transmitter mode - * to the selected slave device through the TWI bus. - * - * \return true on success, false on error. - */ -bool i2c_send(const void *_buf, size_t count) -{ - const uint8_t *buf = (const uint8_t *)_buf; - - while (count--) - { - if (!i2c_put(*buf++)) - return false; - } - return true; -} - - -/** - * Receive a sequence of one or more bytes from the - * selected slave device in master receive mode through - * the TWI bus. - * - * Received data is placed in \c buf. - * - * \note a NACK is automatically given on the last received - * byte. - * - * \return true on success, false on error - */ -bool i2c_recv(void *_buf, size_t count) -{ - uint8_t *buf = (uint8_t *)_buf; - - /* - * When reading the last byte the TWEA bit is not - * set, and the eeprom should answer with NACK - */ - while (count--) - { - /* - * The last byte read does not has an ACK - * to stop communication. - */ - int c = i2c_get(count); - - if (c == EOF) - return false; - else - *buf++ = c; - } - - return true; -} - - MOD_DEFINE(i2c); /** * Initialize TWI module. */ -void i2c_init(void) +void i2c_builtin_init(void) { ATOMIC( /* @@ -295,13 +239,13 @@ void i2c_init(void) * Set speed: * F = CLOCK_FREQ / (16 + 2*TWBR * 4^TWPS) */ - #ifndef CONFIG_TWI_FREQ - #warning Using default value of 300000L for CONFIG_TWI_FREQ - #define CONFIG_TWI_FREQ 300000L /* ~300 kHz */ + #ifndef CONFIG_I2C_FREQ + #warning Using default value of 300000L for CONFIG_I2C_FREQ + #define CONFIG_I2C_FREQ 300000L /* ~300 kHz */ #endif #define TWI_PRESC 1 /* 4 ^ TWPS */ - TWBR = (CLOCK_FREQ / (2 * CONFIG_TWI_FREQ * TWI_PRESC)) - (8 / TWI_PRESC); + TWBR = (CLOCK_FREQ / (2 * CONFIG_I2C_FREQ * TWI_PRESC)) - (8 / TWI_PRESC); TWSR = 0; TWCR = BV(TWEN); );