X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Favr%2Fdrv%2Fkdebug_avr.c;h=5a8d2f3157b31ed5f8c214f805ad381ae14a4a9a;hb=0f60d6b24cf8ec1c9bd8dca82fed6325932c5aca;hp=d8e146372352c158242b41499194990788a63342;hpb=fc026f3166bff01a2c2d9f005506bc363cdc26d3;p=bertos.git

diff --git a/bertos/cpu/avr/drv/kdebug_avr.c b/bertos/cpu/avr/drv/kdebug_avr.c
index d8e14637..5a8d2f31 100644
--- a/bertos/cpu/avr/drv/kdebug_avr.c
+++ b/bertos/cpu/avr/drv/kdebug_avr.c
@@ -33,13 +33,12 @@
  *
  * \brief AVR debug support (implementation).
  *
- * \version $Id$
  * \author Bernie Innocenti <bernie@codewiz.org>
  * \author Stefano Fedrigo <aleph@develer.com>
  * \author Francesco Sacchi <batt@develer.com>
  */
 
-#include "hw/hw_cpu.h"     /* for CLOCK_FREQ */
+#include <hw/hw_cpufreq.h>     /* for CPU_FREQ */
 #include "hw/hw_ser.h"     /* Required for bus macros overrides */
 
 #include "cfg/cfg_debug.h"
@@ -73,7 +72,8 @@
 	#define KDBG_UART0_BUS_TX    do {} while (0)
 	#endif
 
-	#if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA168
+	#if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 \
+	    || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P
 		#define UCR UCSR0B
 		#define UDR UDR0
 		#define USR UCSR0A
@@ -121,14 +121,14 @@
 #elif CONFIG_KDEBUG_PORT == 1
 
 	/*
-		* Support for special bus policies or external transceivers
-		* on UART1 (to be overridden in "hw/hw_ser.h").
-		*
-		* HACK: if we don't set TXEN, kdbg disables the transmitter
-		* after each output statement until the serial driver
-		* is initialized.  These glitches confuse the debug
-		* terminal that ends up printing some trash.
-		*/
+	 * Support for special bus policies or external transceivers
+	 * on UART1 (to be overridden in "hw/hw_ser.h").
+	 *
+	 * HACK: if we don't set TXEN, kdbg disables the transmitter
+	 * after each output statement until the serial driver
+	 * is initialized.  These glitches confuse the debug
+	 * terminal that ends up printing some trash.
+	 */
 	#ifndef KDBG_UART1_BUS_INIT
 	#define KDBG_UART1_BUS_INIT  do { \
 			UCSR1B = BV(TXEN1); \
@@ -160,6 +160,91 @@
 
 	typedef uint8_t kdbg_irqsave_t;
 
+#elif CONFIG_KDEBUG_PORT == 2
+
+	/*
+	 * Support for special bus policies or external transceivers
+	 * on UART2 (to be overridden in "hw/hw_ser.h").
+	 *
+	 * HACK: if we don't set TXEN, kdbg disables the transmitter
+	 * after each output statement until the serial driver
+	 * is initialized.  These glitches confuse the debug
+	 * terminal that ends up printing some trash.
+	 */
+	#ifndef KDBG_UART2_BUS_INIT
+	#define KDBG_UART2_BUS_INIT  do { \
+			UCSR2B = BV(TXEN2); \
+		} while (0)
+	#endif
+	#ifndef KDBG_UART2_BUS_RX
+	#define KDBG_UART2_BUS_RX    do {} while (0)
+	#endif
+	#ifndef KDBG_UART2_BUS_TX
+	#define KDBG_UART2_BUS_TX    do {} while (0)
+	#endif
+
+	#define KDBG_WAIT_READY()     do { loop_until_bit_is_set(UCSR2A, UDRE2); } while(0)
+	#define KDBG_WAIT_TXDONE()    do { loop_until_bit_is_set(UCSR2A, TXC2); } while(0)
+	#define KDBG_WRITE_CHAR(c)    do { UCSR2A |= BV(TXC2); UDR2 = (c); } while(0)
+
+	#define KDBG_MASK_IRQ(old)    do { \
+		(old) = UCSR2B; \
+		UCSR2B |= BV(TXEN2); \
+		UCSR2B &= ~(BV(TXCIE2) | BV(UDRIE2)); \
+		KDBG_UART2_BUS_TX; \
+	} while(0)
+
+	#define KDBG_RESTORE_IRQ(old) do { \
+		KDBG_WAIT_TXDONE(); \
+		KDBG_UART2_BUS_RX; \
+		UCSR2B = (old); \
+	} while(0)
+
+	typedef uint8_t kdbg_irqsave_t;
+
+#elif CONFIG_KDEBUG_PORT == 3
+
+	/*
+	 * Support for special bus policies or external transceivers
+	 * on UART3 (to be overridden in "hw/hw_ser.h").
+	 *
+	 * HACK: if we don't set TXEN, kdbg disables the transmitter
+	 * after each output statement until the serial driver
+	 * is initialized.  These glitches confuse the debug
+	 * terminal that ends up printing some trash.
+	 */
+	#ifndef KDBG_UART3_BUS_INIT
+	#define KDBG_UART3_BUS_INIT  do { \
+			UCSR3B = BV(TXEN3); \
+		} while (0)
+	#endif
+	#ifndef KDBG_UART3_BUS_RX
+	#define KDBG_UART3_BUS_RX    do {} while (0)
+	#endif
+	#ifndef KDBG_UART3_BUS_TX
+	#define KDBG_UART3_BUS_TX    do {} while (0)
+	#endif
+
+	#define KDBG_WAIT_READY()     do { loop_until_bit_is_set(UCSR3A, UDRE3); } while(0)
+	#define KDBG_WAIT_TXDONE()    do { loop_until_bit_is_set(UCSR3A, TXC3); } while(0)
+	#define KDBG_WRITE_CHAR(c)    do { UCSR3A |= BV(TXC3); UDR3 = (c); } while(0)
+
+	#define KDBG_MASK_IRQ(old)    do { \
+		(old) = UCSR3B; \
+		UCSR3B |= BV(TXEN3); \
+		UCSR3B &= ~(BV(TXCIE3) | BV(UDRIE3)); \
+		KDBG_UART3_BUS_TX; \
+	} while(0)
+
+	#define KDBG_RESTORE_IRQ(old) do { \
+		KDBG_WAIT_TXDONE(); \
+		KDBG_UART3_BUS_RX; \
+		UCSR3B = (old); \
+	} while(0)
+
+	typedef uint8_t kdbg_irqsave_t;
+
+
 /*
  * Special debug port for BitBanged Serial see below for details...
  */
@@ -171,7 +256,7 @@
 	#define KDBG_RESTORE_IRQ(old)  do { IRQ_RESTORE((old)); } while(0)
 	typedef cpu_flags_t kdbg_irqsave_t;
 
-	#define KDBG_DELAY (((CLOCK_FREQ + CONFIG_KDEBUG_BAUDRATE / 2) / CONFIG_KDEBUG_BAUDRATE) + 7) / 14
+	#define KDBG_DELAY (((CPU_FREQ + CONFIG_KDEBUG_BAUDRATE / 2) / CONFIG_KDEBUG_BAUDRATE) + 7) / 14
 
 	static void _kdebug_bitbang_delay(void)
 	{
@@ -220,7 +305,7 @@
 		}
 	}
 #else
-	#error CONFIG_KDEBUG_PORT should be either 0, 1 or 666
+	#error CONFIG_KDEBUG_PORT should be either 0, 1, 2, 3 or 666
 #endif
 
 
@@ -230,7 +315,7 @@ INLINE void kdbg_hw_init(void)
 		SER_BITBANG_INIT;
 	#else /* CONFIG_KDEBUG_PORT != 666 */
 		/* Compute the baud rate */
-		uint16_t period = DIV_ROUND(CLOCK_FREQ / 16UL, CONFIG_KDEBUG_BAUDRATE) - 1;
+		uint16_t period = DIV_ROUND(CPU_FREQ / 16UL, CONFIG_KDEBUG_BAUDRATE) - 1;
 
 		#if (CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281)
 			#if CONFIG_KDEBUG_PORT == 0
@@ -245,17 +330,51 @@ INLINE void kdbg_hw_init(void)
 				#error CONFIG_KDEBUG_PORT must be either 0 or 1
 			#endif
 
-		#elif CPU_AVR_ATMEGA168
-			UBRR0H = (uint8_t)(period>>8);
-			UBRR0L = (uint8_t)period;
-			KDBG_UART0_BUS_INIT;
+		#elif CPU_AVR_ATMEGA1280
+			#if CONFIG_KDEBUG_PORT == 0
+				UBRR0H = (uint8_t)(period>>8);
+				UBRR0L = (uint8_t)period;
+				KDBG_UART0_BUS_INIT;
+			#elif CONFIG_KDEBUG_PORT == 1
+				UBRR1H = (uint8_t)(period>>8);
+				UBRR1L = (uint8_t)period;
+				KDBG_UART1_BUS_INIT;
+			#elif CONFIG_KDEBUG_PORT == 2
+				UBRR2H = (uint8_t)(period>>8);
+				UBRR2L = (uint8_t)period;
+				KDBG_UART2_BUS_INIT;
+			#elif CONFIG_KDEBUG_PORT == 3
+				UBRR3H = (uint8_t)(period>>8);
+				UBRR3L = (uint8_t)period;
+				KDBG_UART3_BUS_INIT;
+			#else
+				#error CONFIG_KDEBUG_PORT must be either 0 or 1 or 2 or 3
+			#endif
+
+		#elif CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P
+			#if CONFIG_KDEBUG_PORT == 0
+				UBRR0H = (uint8_t)(period>>8);
+				UBRR0L = (uint8_t)period;
+				KDBG_UART0_BUS_INIT;
+			#else
+				#error Only CONFIG_KDEBUG_PORT 0 is supported for this cpu
+			#endif
+
 		#elif CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA32
-			UBRRH = (uint8_t)(period>>8);
-			UBRRL = (uint8_t)period;
-			KDBG_UART0_BUS_INIT;
+			#if CONFIG_KDEBUG_PORT == 0
+				UBRRH = (uint8_t)(period>>8);
+				UBRRL = (uint8_t)period;
+				KDBG_UART0_BUS_INIT;
+			#else
+				#error Only CONFIG_KDEBUG_PORT 0 is supported for this cpu
+			#endif
 		#elif CPU_AVR_ATMEGA103
-			UBRR = (uint8_t)period;
-			KDBG_UART0_BUS_INIT;
+			#if CONFIG_KDEBUG_PORT == 0
+				UBRR = (uint8_t)period;
+				KDBG_UART0_BUS_INIT;
+			#else
+				#error Only CONFIG_KDEBUG_PORT 0 is supported for this cpu
+			#endif
 		#else
 			#error Unknown CPU
 		#endif