X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Favr%2Fdrv%2Fser_avr.h;h=36d3a6f8fc04f766f64f531640b8f55108f12831;hb=da99e878a65f6ab84e51bdf4c9029c3906431b03;hp=237c3040d03dfacaa1ece8d8dd025626c4f488e0;hpb=50a0738459d136777e082b8fc2b7a2a085f0909b;p=bertos.git diff --git a/bertos/cpu/avr/drv/ser_avr.h b/bertos/cpu/avr/drv/ser_avr.h index 237c3040..36d3a6f8 100644 --- a/bertos/cpu/avr/drv/ser_avr.h +++ b/bertos/cpu/avr/drv/ser_avr.h @@ -26,15 +26,16 @@ * invalidate any other reasons why the executable file might be covered by * the GNU General Public License. * - * Copyright 2007 Develer S.r.l. (http://www.develer.com/) + * Copyright 2007, 2010 Develer S.r.l. (http://www.develer.com/) * * --> * - * \version $Id: timer_arm.h 18273 2007-10-11 14:53:02Z batt $ * * \author Daniele Basile + * \author Luca Ottaviano * * \brief Low-level serial module for AVR (interface). + * */ #ifndef DRV_SER_AVR_H @@ -63,8 +64,7 @@ typedef uint8_t serstatus_t; /** * SPI clock polarity. * - * $WIZARD_LIST = { - * "ser_spi_pol" : ["SPI_NORMAL_LOW", "SPI_NORMAL_HIGH"] + * $WIZ$ ser_spi_pol = "SPI_NORMAL_LOW", "SPI_NORMAL_HIGH" * } */ #define SPI_NORMAL_LOW 0 @@ -73,8 +73,7 @@ typedef uint8_t serstatus_t; /** * SPI clock phase. * - * $WIZARD_LIST = { - * "ser_spi_phase": ["SPI_SAMPLE_ON_FIRST_EDGE", "SPI_SAMPLE_ON_SECOND_EDGE"] + * $WIZ$ ser_spi_phase = "SPI_SAMPLE_ON_FIRST_EDGE", "SPI_SAMPLE_ON_SECOND_EDGE" * } */ #define SPI_SAMPLE_ON_FIRST_EDGE 0 @@ -87,11 +86,18 @@ typedef uint8_t serstatus_t; */ enum { -#if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281 +#if CPU_AVR_ATMEGA1280 + SER_UART0, + SER_UART1, + SER_UART2, + SER_UART3, + SER_SPI, +#elif CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281 SER_UART0, SER_UART1, SER_SPI, -#elif CPU_AVR_ATMEGA103 || CPU_AVR_ATMEGA8 +#elif CPU_AVR_ATMEGA103 || CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA32 || CPU_AVR_ATMEGA168 \ + || CPU_AVR_ATMEGA328P SER_UART0, SER_SPI, #else