X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Favr%2Fdrv%2Fser_avr.h;h=68d5e5085ee639fd3c14d469b01caaf323446afa;hb=517cca1528492422030102f6c1a6691420c1c1a0;hp=4b5518b47ea32f8fc58c38519f9b63a72e698346;hpb=345f93de1963f49bdb194d2b06c8c5d7ba0a3e5f;p=bertos.git

diff --git a/bertos/cpu/avr/drv/ser_avr.h b/bertos/cpu/avr/drv/ser_avr.h
index 4b5518b4..68d5e508 100644
--- a/bertos/cpu/avr/drv/ser_avr.h
+++ b/bertos/cpu/avr/drv/ser_avr.h
@@ -26,15 +26,16 @@
  * invalidate any other reasons why the executable file might be covered by
  * the GNU General Public License.
  *
- * Copyright 2007 Develer S.r.l. (http://www.develer.com/)
+ * Copyright 2007, 2010 Develer S.r.l. (http://www.develer.com/)
  *
  * -->
  *
- * \version $Id: timer_arm.h 18273 2007-10-11 14:53:02Z batt $
  *
  * \author Daniele Basile <asterix@develer.com>
+ * \author Luca Ottaviano <lottaviano@develer.com>
  *
  * \brief Low-level serial module for AVR (interface).
+ *
  */
 
 #ifndef DRV_SER_AVR_H
@@ -60,6 +61,24 @@ typedef uint8_t serstatus_t;
 #define SERRF_NOISEERROR     0      /**< Unsupported */
 
 
+/**
+ * SPI clock polarity.
+ *
+ * $WIZ$ ser_spi_pol = "SPI_NORMAL_LOW", "SPI_NORMAL_HIGH"
+ * }
+ */
+#define SPI_NORMAL_LOW      0
+#define SPI_NORMAL_HIGH     1
+
+/**
+ * SPI clock phase.
+ *
+ * $WIZ$ ser_spi_phase = "SPI_SAMPLE_ON_FIRST_EDGE", "SPI_SAMPLE_ON_SECOND_EDGE"
+ * }
+ */
+#define SPI_SAMPLE_ON_FIRST_EDGE    0
+#define SPI_SAMPLE_ON_SECOND_EDGE   1
+
 /**
  * \name Serial hw numbers
  *
@@ -67,11 +86,18 @@ typedef uint8_t serstatus_t;
  */
 enum
 {
-#if  CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281
+#if  CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
+	SER_UART0,
+	SER_UART1,
+	SER_UART2,
+	SER_UART3,
+	SER_SPI,
+#elif  CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281
 	SER_UART0,
 	SER_UART1,
 	SER_SPI,
-#elif CPU_AVR_ATMEGA103 || CPU_AVR_ATMEGA8
+#elif CPU_AVR_ATMEGA103 || CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA32 || CPU_AVR_ATMEGA168 \
+		|| CPU_AVR_ATMEGA328P
 	SER_UART0,
 	SER_SPI,
 #else