X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Favr%2Fdrv%2Ftimer_mega.c;h=8b76045462a717c3c63866e0ed25025b674057be;hb=268d06bb58409df32c2ca35879347336fa13f167;hp=ee63e76f8d419846eca22e64845a8f3d527a4556;hpb=4c9e017d1b5cad3501d8d93aef46ec513bb03fd0;p=bertos.git

diff --git a/bertos/cpu/avr/drv/timer_mega.c b/bertos/cpu/avr/drv/timer_mega.c
index ee63e76f..8b760454 100644
--- a/bertos/cpu/avr/drv/timer_mega.c
+++ b/bertos/cpu/avr/drv/timer_mega.c
@@ -34,14 +34,14 @@
  * \author Francesco Sacchi <batt@develer.com>
  * \author Luca Ottaviano <lottaviano@develer.com>
  *
- * \brief Low-level timer module for AVR (implementation).
+ * \brief Low-level timer module for AVR MEGA (implementation).
  *
  * This module is automatically included so no need to include
  * in test list.
  * notest: avr
  */
 
-#include <drv/timer_avr.h>
+#include <drv/timer_mega.h>
 #include <cfg/macros.h> // BV()
 
 #include <cpu/types.h>
@@ -126,8 +126,6 @@
 		REG_TIFR0 = BV(BIT_OCF0A) | BV(TOV0);
 
 		/* Setup Timer/Counter interrupt */
-		ASSR = 0x00;                  /* Internal system clock */
-
 		REG_TCCR0A = 0;	// TCCR2 reg could be separate or a unique register with both A & B values, this is needed to
 		REG_TCCR0B = 0;