X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Fcortex-m3%2Fdrv%2Fadc_sam3.c;h=f9fdc132ce2f251e1e967bc8ee552d6cf222fbbc;hb=57fa5e371a8b40afc99b922731b77d17c55330a4;hp=e1e43a97bf9cb29a8dd94b1d3c617991a126ff5c;hpb=f81df2ee3de292493462ee9d0a8905eaafb57243;p=bertos.git diff --git a/bertos/cpu/cortex-m3/drv/adc_sam3.c b/bertos/cpu/cortex-m3/drv/adc_sam3.c index e1e43a97..f9fdc132 100644 --- a/bertos/cpu/cortex-m3/drv/adc_sam3.c +++ b/bertos/cpu/cortex-m3/drv/adc_sam3.c @@ -59,7 +59,7 @@ /* We use event to signal the end of conversion */ -static Event data_ready; +static Event adc_data_ready; /* The last converted data */ static uint32_t data; @@ -76,11 +76,10 @@ static uint32_t data; */ static DECLARE_ISR(adc_conversion_end_irq) { - data = 0; if (ADC_ISR & BV(ADC_DRDY)) { data = ADC_LDATA; - event_do(&data_ready); + event_do(&adc_data_ready); } } @@ -95,14 +94,13 @@ void adc_hw_select_ch(uint8_t ch) ADC_CHER = BV(ch); } - /** * Start an ADC convertion. */ uint16_t adc_hw_read(void) { ADC_CR = BV(ADC_START); - event_wait(&data_ready); + event_wait(&adc_data_ready); return(data); } @@ -115,14 +113,13 @@ void adc_hw_init(void) IRQ_ASSERT_ENABLED(); /* Initialize the dataready event */ - event_initGeneric(&data_ready); + event_initGeneric(&adc_data_ready); /* Clock ADC peripheral */ pmc_periphEnable(ADC_ID); - /* Reset adc controller */ - ADC_CR = ADC_SWRST; + ADC_CR |= BV(ADC_SWRST); /* * Set adc mode register: @@ -144,14 +141,14 @@ void adc_hw_init(void) LOG_INFO("Computed ADC_CLOCK %ld\n", ADC_CLOCK); ADC_MR |= ((ADC_PRESCALER << ADC_PRESCALER_SHIFT) & ADC_PRESCALER_MASK); LOG_INFO("prescaler[%ld]\n", ADC_PRESCALER); - ADC_MR |= ((ADC_SUT512 << ADC_STARTUP_SHIFT) & ADC_STARTUP_MASK); - LOG_INFO("starup[%d]\n", ADC_SUT512); - ADC_MR |= ((ADC_AST17 << ADC_SETTLING_SHIFT) & ADC_SETTLING_MASK); - LOG_INFO("sttime[%d]\n", ADC_AST17); - ADC_MR |= ((0 << ADC_TRACKTIM_SHIFT) & ADC_TRACKTIM_MASK); - LOG_INFO("tracking[%d]\n", 0); - ADC_MR |= ((1 << ADC_TRANSFER_SHIFT) & ADC_TRANSFER_MASK); - LOG_INFO("tranfer[%d]\n", 1); + ADC_MR |= ((CONFIG_ADC_SUT << ADC_STARTUP_SHIFT) & ADC_STARTUP_MASK); + LOG_INFO("starup[%d]\n", CONFIG_ADC_SUT); + ADC_MR |= ((CONFIG_ADC_STTLING << ADC_SETTLING_SHIFT) & ADC_SETTLING_MASK); + LOG_INFO("sttime[%d]\n", CONFIG_ADC_STTLING); + ADC_MR |= ((CONFIG_ADC_TRACKTIM << ADC_TRACKTIM_SHIFT) & ADC_TRACKTIM_MASK); + LOG_INFO("tracking[%d]\n", CONFIG_ADC_TRACKTIM); + ADC_MR |= ((CONFIG_ADC_TRANSFER << ADC_TRANSFER_SHIFT) & ADC_TRANSFER_MASK); + LOG_INFO("tranfer[%d]\n", CONFIG_ADC_TRANSFER); /* Register and enable irq for adc. */ sysirq_setHandler(INT_ADC, adc_conversion_end_irq);