X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Fcortex-m3%2Fdrv%2Fclock_sam3.c;h=38b526269903aa2c3cf65aa56ae958d8d9c5f0d8;hb=0a06817da12212b29cac740066fe51c89e1084af;hp=dfb2eb240ff812fdb20060a579063a7d08127864;hpb=e444d916197e4345dd2bbd85800d8544c2699096;p=bertos.git diff --git a/bertos/cpu/cortex-m3/drv/clock_sam3.c b/bertos/cpu/cortex-m3/drv/clock_sam3.c index dfb2eb24..38b52626 100644 --- a/bertos/cpu/cortex-m3/drv/clock_sam3.c +++ b/bertos/cpu/cortex-m3/drv/clock_sam3.c @@ -30,7 +30,7 @@ * * --> * - * \brief ATSAM3 clock setup. + * \brief Atmel SAM3 clock setup. * * \author Stefano Fedrigo */ @@ -38,13 +38,11 @@ #include "clock_sam3.h" #include #include -#include -#include -#include -#include +#include /* Frequency of board main oscillator */ +// TODO: wizard config #define BOARDOSC_FREQ 12000000 /* Main crystal oscillator startup time, optimal value for CPU_FREQ == 48 MHz */ @@ -83,8 +81,7 @@ INLINE uint32_t evaluate_pll(void) } } - // Bit 29 must always be set to 1 - return CKGR_PLLR_DIV(best_div) | CKGR_PLLR_MUL(best_mul) | BV(29); + return CKGR_PLLR_DIV(best_div) | CKGR_PLLR_MUL(best_mul); } @@ -95,15 +92,21 @@ void clock_init(void) /* Disable watchdog */ WDT_MR = BV(WDT_WDDIS); - /* Set 4 wait states for flash access, needed for higher CPU clock rates */ - EEFC_FMR = EEFC_FMR_FWS(3); +#if CPU_CM3_SAM3X + /* Set wait states for flash access, needed for higher CPU clock rates */ + EEFC0_FMR = EEFC_FMR_FWS(2); + EEFC1_FMR = EEFC_FMR_FWS(2); +#else + EEFC0_FMR = EEFC_FMR_FWS(3); + // TODO: check if this is needed in sam3n-ek too, very slow start-up // Select external slow clock if (!(SUPC_SR & BV(SUPC_SR_OSCSEL))) { SUPC_CR = BV(SUPC_CR_XTALSEL) | SUPC_CR_KEY(0xA5); while (!(SUPC_SR & BV(SUPC_SR_OSCSEL))); } +#endif // Initialize main oscillator if (!(CKGR_MOR & BV(CKGR_MOR_MOSCSEL))) @@ -134,4 +137,13 @@ void clock_init(void) PMC_MCKR = PMC_MCKR_CSS_PLL_CLK; timeout = CLOCK_TIMEOUT; while (!(PMC_SR & BV(PMC_SR_MCKRDY)) && --timeout); + + /* Enable clock on PIO for inputs */ + // TODO: move this in gpio_init() for better power management? +#if CPU_CM3_SAM3X + PMC_PCER = BV(PIOA_ID) | BV(PIOB_ID) | BV(PIOC_ID) + | BV(PIOD_ID) | BV(PIOE_ID) | BV(PIOF_ID); +#else + PMC_PCER = BV(PIOA_ID) | BV(PIOB_ID) | BV(PIOC_ID); +#endif }