X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Fcortex-m3%2Fdrv%2Fhsmci_sam3.c;h=51b79d9cd4723b11a411cdd782c5d8f9dea28734;hb=b8654961cd6761207f6fc880229b39314f6749e2;hp=b797f7b5a81753460842e60571bfcc35dcd2ce87;hpb=55574912ce4d7364597388a112805147a9618351;p=bertos.git

diff --git a/bertos/cpu/cortex-m3/drv/hsmci_sam3.c b/bertos/cpu/cortex-m3/drv/hsmci_sam3.c
index b797f7b5..51b79d9c 100644
--- a/bertos/cpu/cortex-m3/drv/hsmci_sam3.c
+++ b/bertos/cpu/cortex-m3/drv/hsmci_sam3.c
@@ -36,11 +36,13 @@
 
 
 #include "hsmci_sam3.h"
+#include "hw/hw_sd.h"
 
 #include <drv/timer.h>
-#include <cpu/irq.h>
 #include <drv/irq_cm3.h>
 
+#include <cpu/irq.h>
+
 #include <io/cm3.h>
 
 /** DMA Transfer Descriptor as well as Linked List Item */
@@ -53,22 +55,8 @@ typedef struct DmacDesc
     uint32_t dsc_addr;     /**< Next descriptor address */
 } DmacDesc;
 
-
-
-
 #define HSMCI_CLK_DIV(RATE)     ((CPU_FREQ / (RATE << 1)) - 1)
 
-#define HSMCI_ERROR_MASK   (BV(HSMCI_SR_RINDE)    | \
-							BV(HSMCI_SR_RDIRE)    | \
-							BV(HSMCI_SR_RCRCE)    | \
-							BV(HSMCI_SR_RENDE)    | \
-							BV(HSMCI_SR_RTOE)     | \
-							BV(HSMCI_SR_DCRCE)    | \
-							BV(HSMCI_SR_DTOE)     | \
-							BV(HSMCI_SR_CSTOE)    | \
-							BV(HSMCI_SR_BLKOVRE)  | \
-							BV(HSMCI_SR_ACKRCVE))
-
 
 #define HSMCI_RESP_ERROR_MASK   (BV(HSMCI_SR_RINDE) | BV(HSMCI_SR_RDIRE) \
 	  | BV(HSMCI_SR_RENDE)| BV(HSMCI_SR_RTOE))
@@ -87,23 +75,6 @@ typedef struct DmacDesc
 		cpu_relax(); \
 	} while (!(HSMCI_SR & BV(HSMCI_SR_RXRDY)))
 
-#define HSMCI_ERROR()   (HSMCI_SR & HSMCI_ERROR_MASK)
-
-#define HSMCI_HW_INIT()  \
-do { \
-	PIOA_PDR = BV(19) | BV(20) | BV(21) | BV(22) | BV(23) | BV(24); \
-	PIO_PERIPH_SEL(PIOA_BASE, BV(19) | BV(20) | BV(21) | BV(22) | BV(23) | BV(24), PIO_PERIPH_A); \
-} while (0)
-
-
-#define STROBE_ON()   PIOB_SODR = BV(13)
-#define STROBE_OFF()  PIOB_CODR = BV(13)
-#define STROBE_INIT() \
-	do { \
-		PIOB_OER = BV(13); \
-		PIOB_PER = BV(13); \
-	} while(0)
-
 static DECLARE_ISR(hsmci_irq)
 {
 	uint32_t status = HSMCI_SR;
@@ -112,7 +83,6 @@ static DECLARE_ISR(hsmci_irq)
 	}
 }
 
-
 static DECLARE_ISR(dmac_irq)
 {
 	uint32_t stat = DMAC_EBCISR;
@@ -133,7 +103,6 @@ void hsmci_readResp(uint32_t *resp, size_t len)
 
 bool hsmci_sendCmd(uint8_t index, uint32_t argument, uint32_t reply_type)
 {
-	STROBE_ON();
 	HSMCI_WAIT();
 
 	HSMCI_ARGR = argument;
@@ -150,7 +119,6 @@ bool hsmci_sendCmd(uint8_t index, uint32_t argument, uint32_t reply_type)
 		status = HSMCI_SR;
 	}
 
-	STROBE_OFF();
 	return 0;
 }
 
@@ -160,7 +128,7 @@ INLINE void hsmci_setBlockSize(size_t blk_size)
 	HSMCI_BLKR = blk_size << HSMCI_BLKR_BLKLEN_SHIFT;
 }
 
-void hsmci_prgTxDMA(uint32_t *buf, size_t word_num, size_t blk_size)
+void hsmci_prgTxDMA(const uint32_t *buf, size_t word_num, size_t blk_size)
 {
 
 	hsmci_setBlockSize(blk_size);
@@ -225,8 +193,7 @@ void hsmci_init(Hsmci *hsmci)
 {
 	(void)hsmci;
 
-	HSMCI_HW_INIT();
-	STROBE_INIT();
+	SD_PIN_INIT();
 
 	pmc_periphEnable(HSMCI_ID);
 	HSMCI_CR = BV(HSMCI_CR_SWRST);
@@ -246,7 +213,6 @@ void hsmci_init(Hsmci *hsmci)
 	DMAC_EBCIDR = 0x3FFFFF;
 	DMAC_CHDR = 0x1F;
 
-
 	pmc_periphEnable(DMAC_ID);
 	DMAC_EN = BV(DMAC_EN_ENABLE);
 	sysirq_setHandler(INT_DMAC, dmac_irq);