X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Fcortex-m3%2Fdrv%2Fhsmci_sam3.h;h=cfb6e4cd5a9837e7a954dea3aaf28b8ca7ddde42;hb=563795df4180aaceb7d69306551230c98fbca879;hp=f5cebdc776a8610e8329f6fe975431aa84ed3672;hpb=4dc00864c00e6921183e89bb2c4256fef09ff78d;p=bertos.git

diff --git a/bertos/cpu/cortex-m3/drv/hsmci_sam3.h b/bertos/cpu/cortex-m3/drv/hsmci_sam3.h
index f5cebdc7..cfb6e4cd 100644
--- a/bertos/cpu/cortex-m3/drv/hsmci_sam3.h
+++ b/bertos/cpu/cortex-m3/drv/hsmci_sam3.h
@@ -43,37 +43,16 @@
 
 #include <io/cm3.h>
 
-#define CMD8_V_RANGE_CHECK_PAT    0xAA
-#define CMD8_V_RANGE_27V_36V      (0x100 | CMD8_V_RANGE_CHECK_PAT)
-#define CMD8_V_RANGE_LOW          (0x1000 | CMD8_V_RANGE_CHECK_PAT)
-#define CMD8_V_ECHO_REPLY         0xFF
-#define CMD8_SUPP_V_RANGE_REPLY   0xFF00
-
-
-#define SD_OCR_CCS              BV(30)     /**< SD Card Capacity Status (CCS) */
-#define SD_OCR_BUSY             BV(31)     /**< SD/MMC Card power up status bit (busy) */
-
-#define SD_OCR_VDD_27_28        BV(15)
-#define SD_OCR_VDD_28_29        BV(16)
-#define SD_OCR_VDD_29_30        BV(17)
-#define SD_OCR_VDD_30_31        BV(18)
-#define SD_OCR_VDD_31_32        BV(19)
-#define SD_OCR_VDD_32_33        BV(20)
-
-
-#define SD_HOST_VOLTAGE_RANGE     (SD_OCR_VDD_27_28 | \
-                                   SD_OCR_VDD_28_29 | \
-                                   SD_OCR_VDD_29_30 | \
-                                   SD_OCR_VDD_30_31 | \
-                                   SD_OCR_VDD_31_32 | \
-                                   SD_OCR_VDD_32_33)
-
 #define HSMCI_CHECK_BUSY() \
 	do { \
 		cpu_relax(); \
 	} while (!(HSMCI_SR & BV(HSMCI_SR_NOTBUSY)))
 
 
+#define HSMCI_INIT_SPEED  400000
+#define HSMCI_HIGH_SPEED  21000000
+
+#define HSMCI_HS_MODE     BV(0)
 
 typedef struct Hsmci
 {
@@ -91,16 +70,23 @@ INLINE void hsmci_disableIrq(void)
 
 INLINE void hsmci_setBusWidth(size_t len)
 {
-	ASSERT((len == 8) || (len == 4) || (len == 1));
-	HSMCI_SDCR = (len << HSMCI_SDCR_SDCBUS_SHIFT) & HSMCI_SDCR_SDCBUS_MASK;
+	int sdcsel= 0;
+	if (len == 4)
+		sdcsel = 2;
+	if (len == 8)
+		sdcsel = 3;
+
+	HSMCI_SDCR = (sdcsel << HSMCI_SDCR_SDCBUS_SHIFT) & HSMCI_SDCR_SDCBUS_MASK;
 }
 
-void hsmci_readResp(void *resp, size_t len);
+void hsmci_readResp(uint32_t *resp, size_t len);
 bool hsmci_sendCmd(uint8_t index, uint32_t argument, uint32_t reply_type);
 
-void hsmci_setBlkSize(size_t blk_size);
-bool hsmci_read(uint32_t *buf, size_t word_num);
+void hsmci_read(uint32_t *buf, size_t word_num, size_t blk_size);
+void hsmci_write(const uint32_t *buf, size_t word_num, size_t blk_size);
+void hsmci_waitTransfer(void);
 
+void hsmci_setSpeed(uint32_t data_rate, int flag);
 
 
 void hsmci_init(Hsmci *hsmci);