X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Fcortex-m3%2Fdrv%2Firq_cm3.c;h=14311d9567b56cabb60a0316aa5be74d7f99c289;hb=57fa5e371a8b40afc99b922731b77d17c55330a4;hp=a21439a7a74e28df402a60e0b66b8cb4711fd434;hpb=9a332b1eebc9dba4b9cc5cfa901fe414824ceea1;p=bertos.git

diff --git a/bertos/cpu/cortex-m3/drv/irq_cm3.c b/bertos/cpu/cortex-m3/drv/irq_cm3.c
index a21439a7..14311d95 100644
--- a/bertos/cpu/cortex-m3/drv/irq_cm3.c
+++ b/bertos/cpu/cortex-m3/drv/irq_cm3.c
@@ -35,13 +35,20 @@
  * \author Andrea Righi <arighi@develer.com>
  */
 
+#include "irq_cm3.h"
+
 #include <cfg/debug.h> /* ASSERT() */
 #include <cfg/log.h> /* LOG_ERR() */
 #include <cpu/irq.h>
-#include "irq_cm3.h"
 
+
+#ifdef __IAR_SYSTEMS_ICC__
+#pragma data_alignment=0x400
+static void (*irq_table[NUM_INTERRUPTS])(void);
+#else
 static void (*irq_table[NUM_INTERRUPTS])(void)
 			__attribute__((section("vtable")));
+#endif
 
 /* Priority register / IRQ number table */
 static const uint32_t nvic_prio_reg[] =
@@ -61,7 +68,11 @@ static NAKED NORETURN void unhandled_isr(void)
 {
 	register uint32_t reg;
 
+#ifdef __IAR_SYSTEMS_ICC__
+	reg = CPU_READ_IPSR();
+#else
 	asm volatile ("mrs %0, ipsr" : "=r"(reg));
+#endif
 	LOG_ERR("unhandled IRQ %lu\n", reg);
 	while (1)
 		PAUSE;
@@ -83,9 +94,9 @@ static void sysirq_enable(sysirq_t irq)
 {
 	/* Enable the IRQ line (only for generic IRQs) */
 	if (irq >= 16 && irq < 48)
-		HWREG(NVIC_EN0) = 1 << (irq - 16);
+		NVIC_EN0_R = 1 << (irq - 16);
 	else if (irq >= 48)
-		HWREG(NVIC_EN1) = 1 << (irq - 48);
+		NVIC_EN1_R = 1 << (irq - 48);
 }
 
 void sysirq_setHandler(sysirq_t irq, sysirq_handler_t handler)
@@ -122,6 +133,6 @@ void sysirq_init(void)
 		irq_table[i] = unhandled_isr;
 
 	/* Update NVIC to point to the new vector table */
-	HWREG(NVIC_VTABLE) = (size_t)irq_table;
+	NVIC_VTABLE_R = (size_t)irq_table;
 	IRQ_RESTORE(flags);
 }