X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Fcortex-m3%2Fdrv%2Firq_cm3.c;h=14311d9567b56cabb60a0316aa5be74d7f99c289;hb=666af47976ef74df740dc7df58fc31fa6e3fc65b;hp=d71876fe47c4efd700c54c6e9139c6915671182c;hpb=c67c140d701f3f196aed3352f2518cbef5976853;p=bertos.git diff --git a/bertos/cpu/cortex-m3/drv/irq_cm3.c b/bertos/cpu/cortex-m3/drv/irq_cm3.c index d71876fe..14311d95 100644 --- a/bertos/cpu/cortex-m3/drv/irq_cm3.c +++ b/bertos/cpu/cortex-m3/drv/irq_cm3.c @@ -35,13 +35,20 @@ * \author Andrea Righi */ +#include "irq_cm3.h" + #include /* ASSERT() */ #include /* LOG_ERR() */ #include -#include "irq_cm3.h" + +#ifdef __IAR_SYSTEMS_ICC__ +#pragma data_alignment=0x400 +static void (*irq_table[NUM_INTERRUPTS])(void); +#else static void (*irq_table[NUM_INTERRUPTS])(void) __attribute__((section("vtable"))); +#endif /* Priority register / IRQ number table */ static const uint32_t nvic_prio_reg[] = @@ -61,7 +68,11 @@ static NAKED NORETURN void unhandled_isr(void) { register uint32_t reg; +#ifdef __IAR_SYSTEMS_ICC__ + reg = CPU_READ_IPSR(); +#else asm volatile ("mrs %0, ipsr" : "=r"(reg)); +#endif LOG_ERR("unhandled IRQ %lu\n", reg); while (1) PAUSE;