X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Fcortex-m3%2Fdrv%2Firq_cm3.c;h=14311d9567b56cabb60a0316aa5be74d7f99c289;hb=7a825da467bf9ce79329686b37d373c709c9937d;hp=bbae832428fdd870274040234448f471eb7b2667;hpb=6cdf30122278c0c69a828c290e31f7b2c03c450f;p=bertos.git

diff --git a/bertos/cpu/cortex-m3/drv/irq_cm3.c b/bertos/cpu/cortex-m3/drv/irq_cm3.c
index bbae8324..14311d95 100644
--- a/bertos/cpu/cortex-m3/drv/irq_cm3.c
+++ b/bertos/cpu/cortex-m3/drv/irq_cm3.c
@@ -41,8 +41,14 @@
 #include <cfg/log.h> /* LOG_ERR() */
 #include <cpu/irq.h>
 
+
+#ifdef __IAR_SYSTEMS_ICC__
+#pragma data_alignment=0x400
+static void (*irq_table[NUM_INTERRUPTS])(void);
+#else
 static void (*irq_table[NUM_INTERRUPTS])(void)
 			__attribute__((section("vtable")));
+#endif
 
 /* Priority register / IRQ number table */
 static const uint32_t nvic_prio_reg[] =
@@ -62,7 +68,11 @@ static NAKED NORETURN void unhandled_isr(void)
 {
 	register uint32_t reg;
 
+#ifdef __IAR_SYSTEMS_ICC__
+	reg = CPU_READ_IPSR();
+#else
 	asm volatile ("mrs %0, ipsr" : "=r"(reg));
+#endif
 	LOG_ERR("unhandled IRQ %lu\n", reg);
 	while (1)
 		PAUSE;