X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Fcortex-m3%2Fdrv%2Fkdebug_sam3.c;h=5297d6026135cd2d7e0d4c2e8908bd3b5854aa52;hb=a0ba2de64a3964445b392a269ac820c03c5b8385;hp=3438c05c3877318e0a71f2ba06d4323b6215af1c;hpb=c37e6a3f6900ec803c2608fb387054247bab88aa;p=bertos.git diff --git a/bertos/cpu/cortex-m3/drv/kdebug_sam3.c b/bertos/cpu/cortex-m3/drv/kdebug_sam3.c index 3438c05c..5297d602 100644 --- a/bertos/cpu/cortex-m3/drv/kdebug_sam3.c +++ b/bertos/cpu/cortex-m3/drv/kdebug_sam3.c @@ -41,16 +41,18 @@ #include -#if CONFIG_KDEBUG_PORT == 0 +#if (CONFIG_KDEBUG_PORT == 0) #define UART_BASE UART0_BASE #define UART_ID UART0_ID - #define UART_PIO_BASE PIOA_BASE - #define UART_PINS (BV(RXD0) | BV(TXD0)) -#elif (CONFIG_KDEBUG_PORT == 1) && !defined(CPU_CM3_SAM3U) + #define UART_PIO_BASE UART0_PORT + #define UART_PERIPH UART0_PERIPH + #define UART_PINS (BV(URXD0) | BV(UTXD0)) +#elif (CONFIG_KDEBUG_PORT == 1) && UART_PORTS > 1 #define UART_BASE UART1_BASE #define UART_ID UART1_ID - #define UART_PIO_BASE PIOB_BASE - #define UART_PINS (BV(RXD1) | BV(TXD1)) + #define UART_PIO_BASE UART1_PORT + #define UART_PERIPH UART1_PERIPH + #define UART_PINS (BV(URXD1) | BV(UTXD1)) #else #error "UART port not supported in this board" #endif @@ -72,13 +74,15 @@ typedef uint32_t kdbg_irqsave_t; INLINE void kdbg_hw_init(void) { - /* Disable PIO mode and set appropriate UART pins peripheral mode */ + /* + * Disable PIO mode and set appropriate UART pins peripheral mode. + * SAM3X,A,N,S,U: all of them has all UARTs on peripheral A. + */ HWREG(UART_PIO_BASE + PIO_PDR_OFF) = UART_PINS; - HWREG(UART_PIO_BASE + PIO_ABCDSR1_OFF) &= ~UART_PINS; - HWREG(UART_PIO_BASE + PIO_ABCDSR2_OFF) &= ~UART_PINS; + PIO_PERIPH_SEL(UART_PIO_BASE, UART_PINS, UART_PERIPH); /* Enable the peripheral clock */ - PMC_PCER = BV(UART_ID); + pmc_periphEnable(UART_ID); /* Reset and disable receiver & transmitter */ HWREG(UART_BASE + UART_CR_OFF) = BV(UART_CR_RSTRX) | BV(UART_CR_RSTTX) | BV(UART_CR_RXDIS) | BV(UART_CR_TXDIS);