X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Fcortex-m3%2Fdrv%2Fser_lm3s.c;h=12590b893acf7daf2ce1e6a75c4252f2d2c9751d;hb=911d2706a86d326786bfe721dcc3d63aeade7f28;hp=89ce1322413e682a0c245660bf05299ae4126ba2;hpb=331c599b373f17626ebfffedeb4204c033c8b002;p=bertos.git diff --git a/bertos/cpu/cortex-m3/drv/ser_lm3s.c b/bertos/cpu/cortex-m3/drv/ser_lm3s.c index 89ce1322..12590b89 100644 --- a/bertos/cpu/cortex-m3/drv/ser_lm3s.c +++ b/bertos/cpu/cortex-m3/drv/ser_lm3s.c @@ -36,7 +36,6 @@ */ #include /* for BV() */ -#include /* lm3s_busyWait() */ #include #include #include @@ -61,6 +60,8 @@ static struct CM3Serial UARTDesc[SER_CNT]; /* GPIO descriptor for UART pins */ struct gpio_uart_info { + /* Sysctl */ + uint32_t sysctl; /* GPIO base address register */ uint32_t base; /* Pin(s) bitmask */ @@ -74,25 +75,22 @@ static const struct gpio_uart_info gpio_uart[SER_CNT] = { .base = GPIO_PORTA_BASE, .pins = BV(1) | BV(0), + .sysctl = SYSCTL_RCGC2_GPIOA, }, /* UART1 */ { .base = GPIO_PORTD_BASE, .pins = BV(3) | BV(2), + .sysctl = SYSCTL_RCGC2_GPIOD, }, /* UART2 */ { .base = GPIO_PORTG_BASE, .pins = BV(1) | BV(0), + .sysctl = SYSCTL_RCGC2_GPIOG, }, }; -/* Clear the flags register */ -INLINE void lm3s_uartClear(uint32_t base) -{ - HWREG(base + UART_O_FR) = 0; -} - void lm3s_uartSetBaudRate(uint32_t base, unsigned long baud) { unsigned long div; @@ -153,7 +151,7 @@ void lm3s_uartInit(int port) /* Enable the peripheral clock */ SYSCTL_RCGC1_R |= reg_clock; - SYSCTL_RCGC2_R |= SYSCTL_RCGC2_GPIOA; + SYSCTL_RCGC2_R |= gpio_uart[port].sysctl; lm3s_busyWait(512); /* Configure GPIO pins to work as UART pins */ @@ -194,7 +192,8 @@ static void uart_irq_tx(int port) while (lm3s_uartTxReady(base)) { - if (fifo_isempty(txfifo)) { + if (fifo_isempty(txfifo)) + { /* * Disable TX empty interrupts if there're no more * characters to transmit. @@ -222,8 +221,7 @@ static void uart_common_irq_handler(int port) uart_irq_tx(port); } -static void -lm3s_uartIRQEnable(int port, sysirq_handler_t handler) +static void lm3s_uartIRQEnable(int port, sysirq_handler_t handler) { uint32_t base = UARTDesc[port].base; sysirq_t irq = UARTDesc[port].irq;